EM78P350N
8-Bit Microprocessor with OTP ROM
6.16.2 Code Option Register (Word 1)
Word 1
Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
POREN NRHL NRE CYES C3 C2 C1 C0 RCM1 RCM0
Bit 12 Bit 11 Bit 10 Bit 9
Bit 8 Bit 7
–
–
–
Bits 12~10: Not used, (reserved). These bits are set to “1” all the time.
Bit 9 (POREN): Power on Reset Enable/Disable bit
0 = Disable power-on reset
1 = Enable power-on reset (default)
Bit 8 (NRHL): Noise rejection high/low pulses define bit when the signal at INT pin has
a falling edge trigger.
0 = Pulses equal to 8/fc is regarded as signal
1 = Pulses equal to 32/fc is regarded as signal (default)
NOTE
The noise rejection function is turned off under the LXT and sleep mode.
Bit 7 (NRE): Noise rejection enable
0 = disable noise rejection
1 = enable noise rejection (default). However in Low Crystal oscillator
(LXT) mode, the noise rejection circuit is always disabled.
Bit 6 (CYES): Instruction cycle selection bit
0 = one instruction cycle
1 = two instruction cycles (default)
Bits 5, 4, 3 & Bit 2 ( C3, C2, C1, & C0 ): Internal RC mode Calibration bits. These bits
must always be set to “1” only (auto calibration)
Bit 1 & Bit 0 (RCM1 & RCM0): RC mode selection bits
RCM 1
RCM 0
Frequency (MHz)
1
1
0
0
1
0
1
0
4
8
1
455kHz
6.15.3 Customer ID Register (Word 2)
Word 2
Bit 12 Bit 11 Bit 10 Bit 9 Bit 8
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
×
×
×
×
×
×
×
×
×
×
×
×
×
Bits 12 ~ 0 : Customer’s ID code
Product Specification (V 1.0) 09.14.2006
(This specification is subject to change without further notice)
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ELAN [ ELAN MICROELECTRONICS CORP ]
