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EM78P341 参数 Datasheet PDF下载

EM78P341图片预览
型号: EM78P341
PDF下载: 下载PDF文件 查看货源
内容描述: 8位OTP微 [8-Bit Microprocessor with OTP ROM]
分类和应用: OTP只读存储器
文件页数/大小: 102 页 / 1294 K
品牌: ELAN [ ELAN MICROELECTRONICS CORP ]
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EM78P341N/342N/343N  
8-Bit Microprocessor with OTP ROM  
6.7 Analog-To-Digital Converter (ADC)  
The analog-to-digital circuitry consist of a 4-bit analog multiplexer; three control  
registers (AISR/R8, ADCON/R9, & ADOC/RA), three data registers (ADDATA/RB,  
ADDATA1H/RC, & ADDATA1L/RD), and an ADC with 12-bit resolution as shown in the  
functional block diagram below. The analog reference voltage (Vref) and the analog  
ground are connected via separate input pins.  
The ADC module utilizes successive approximation to convert the unknown analog  
signal into a digital value. The result is fed to the ADDATA, ADDATA1H, and  
ADDATA1L. Input channels are selected by the analog input multiplexer via the  
ADCON register Bits ADIS1 and ADIS0.  
ADC7  
ADC6  
ADC5  
Vref  
ADC4  
ADC3  
ADC2  
ADC1  
ADC0  
Power-Down  
ADC  
Start to Convert  
( successive approximation )  
Fsco  
4-1  
MUX  
Internal RC  
7
~ 0  
1
0
3
4
3
11 10  
9
8
7
6
5
4
3
2
1
0
6
5
ADCON  
ADCON  
ADCON  
DATA BUS  
RF  
AISR  
ADDATA1H  
ADDATA1L  
Fig. 6-11 Analog-to-Digital Conversion Functional Block Diagram  
6.7.1 ADC Control Register (AISR/R8, ADCON/R9, ADOC/RA)  
6.7.1.1 R8 (AISR: ADC Input Select Register)  
Bit 7  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
Bit 0  
ADE7  
ADE6  
ADE5  
ADE4  
ADE3  
ADE2  
ADE1  
ADE0  
AISR register defines the P5, P6, P7 pins as analog inputs or as digital I/O, individually.  
Bit 7 (ADE7): AD converter enable bit of P57 pin  
0 = Disable ADC7, P57 functions as I/O pin  
1 = Enable ADC7 to function as analog input pin  
Bit 6 (ADE6): AD converter enable bit of P55 pin  
0 = Disable ADC6, P55 functions as I/O pin  
1 = Enable ADC6 to function as analog input pin  
Bit 5 (ADE5): AD converter enable bit of P70 pin  
0 = Disable ADC5, P70 functions as I/O pin  
1 = Enable ADC5 to function as analog input pin  
Product Specification (V1.0) 12.01.2006  
(This specification is subject to change without further notice)  
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