EM78P341N/342N/343N
8-Bit Microprocessor with OTP ROM
Bit 6 & Bit 5 (CKR1 & CKR0): The prescaler of ADC oscillator clock rate
00 = 1: 16 (default value)
01 = 1: 4
10 = 1: 64
11 = 1: 8
CPUS
CKR1: CKR0 Operation Mode Max. Operation Frequency
1
1
1
1
0
00
01
10
11
××
Fosc/16
Fosc/4
4MHz
1MHz
16MHz
2MHz
−
Fosc/64
Fosc/8
Internal RC
Bit 4 (ADRUN): ADC starts to RUN
1 = an AD conversion is started. This bit can be set by software.
0 = Reset upon completion of the conversion. This bit cannot be
reset through software
Bit 3 (ADPD): ADC Power-down mode.
1 = ADC is operating
0 = switch off the resistor reference to save power even
while the CPU is operating.
Bit 2 ~ Bit 0 (ADIS2 ~ ADIS0): Analog Input Select
000 = ADIN0/P50
001 = ADIN1/P51
010 = ADIN2/P52
011 = ADIN3/P53
100 = ADIN0/P67
101 = ADIN1/P70
110 = ADIN2/P55
111 = ADIN3/P57
These bits can only be changed when the ADIF bit and the ADRUN bit
are both LOW.
6.7.1.3 RA (ADOC: AD Offset Calibration Register)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
CALI
SIGN
VOF[2]
VOF[1]
VOF[0]
–
–
–
Bit 7 (CALI): Calibration enable bit for ADC offset
0 = disable Calibration
1 = enable Calibration
Bit 6 (SIGN): Polarity bit of offset voltage
0 = Negative voltage
1 = Positive voltage
Product Specification (V1.0) 12.01.2006
(This specification is subject to change without further notice)
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ELAN [ ELAN MICROELECTRONICS CORP ]
