EM78P341N/342N/343N
8-Bit Microprocessor with OTP ROM
Bit 0 (IROUTE): Control bit used to define the P67 (IROUT) pin function
0 = P67 defined as bi-directional I/O pin
1 = P67 defined as IROUT. Under this condition, the I/O control bit
of P67 (Bit 7 of IOC60) must be set to “0”
6.2.7 IOCB0 (Pull-Down Control Register)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
/PD57
/PD56
/PD55
/PD54
/PD53
/PD52
/PD51
/PD50
NOTE
IOCB0 register is both readable and writable
Bit 7 (/PD57): Control bit used to enable the pull-down function of the P57 pin
(applicable to EM78P343N only)
0 = Enable internal pull-down
1 = Disable internal pull-down
Bit 6 (/PD56): Control bit is used to enable the pull-down function of the P56 pin
(applicable to EM78P343N only)
Bit 5 (/PD55): Control bit used to enable the pull-down function of the P55 pin
Bit 4 (/PD54): Control bit used to enable the pull-down function of the P54 pin
Bit 3 (/PD53): Control bit used to enable the pull-down function of the P53 pin
Bit 2 (/PD52): Control bit used to enable the pull-down function of the P52 pin
Bit 1 (/PD51): Control bit used to enable the pull-down function of the P51 pin
Bit 0 (/PD50): Control bit used to enable the pull-down function of the P50 pin.
6.2.8 IOCC0 (Open-Drain Control Register)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
/OD67
/OD66
/OD65
/OD64
/OD63
/OD62
/OD61
/OD60
NOTE
The IOCC0 register is both readable and writable.
Bit 7 (/OD67): Control bit is used to enable the open-drain output of the P67 pin
0 = Enable open-drain output
1 = Disable open-drain output
Bit 6 (/OD66): Control bit used to enable the open-drain output of the P66 pin
Bit 5 (/OD65): Control bit used to enable the open-drain output of the P65 pin
(Not applicable to EM78P341N)
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Product Specification (V1.0) 12.01.2006
(This specification is subject to change without further notice)