EM78P341N/342N/343N
8-Bit Microprocessor with OTP ROM
6.2.3 IOC50 ~ IOC70 (I/O Port Control Register)
"1" sets the relative I/O pin into high impedance, while "0" defines the relative I/O
pin as output.
Only the lower six bits of IOC50 can be defined (this applies to EM78P341N/342N
only since all bits of EM78P343N can be used).
Only Bit 0, Bit 1, Bit 6, Bit 7 of IOC60 can be defined (this applies to EM78P341N
only since all bits of EM78P343N can be used)
Only the lower two bits of IOC70 can be defined, the others bits are not available.
IOC50, IOC60, and IOC70 registers are all readable and writable
6.2.4 IOC80 (Comparator and TCCA Control Register)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
–
–
CMPOUT
COS1
COS0
TCCAEN TCCATS TCCATE
NOTE
■ Bits 4 ~ 0 of the IOC80 register are both readable and writable
■ EM78P341N cannot use the OP/comparator function
■ Bit 5 of the IOC80 register is readable only.
Bit 7 & Bit 6: Not used
Bit 5 (CMPOUT): Result of the comparator output. This bit is readable only.
Bit 4 & Bit 3 (COS1 & COS0): Comparator/OP Select bits
COS1
COS0
Function Description
Comparator and OP are not used. P64, P65, and P66 function as
normal I/O pin
0
0
0
1
1
1
0
1
Used as Comparator and P64 functions as normal I/O pin
Used as Comparator and P64 functions as Comparator output pin (CO)
Used as OP and P64 functions as OP output pin (CO)
Bit 2 (TCCAEN): TCCA enable bit
0 = disable TCCA
1 = enable TCCA as a counter
TCCA signal source
Bit 1 (TCCATS):
Bit 0 (TCCATE):
0 =: internal instruction cycle clock. P61 is a bidirectional I/O pin.
1 = transit through the TCCA pin
TCCA signal edge
0 = increment if transition from low to high takes place on the
TCCA pin
1 = increment if transition from high to low takes place on the
TCCA pin
Product Specification (V1.0) 12.01.2006
(This specification is subject to change without further notice)
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ELAN [ ELAN MICROELECTRONICS CORP ]
