EM78P341N/342N/343N
8-Bit Microprocessor with OTP ROM
Bit 6 (EIS):
Control bit used to define the function of the P60 (/INT) pin
0 = P60, bidirectional I/O pin
1 = /INT, external interrupt pin. In this case, the I/O control bit of P60
(Bit 0 of IOC60) must be set to "1".
NOTE
■ When EIS is "0", the path of /INT is masked. When EIS is "1", the status of /INT pin
can also be read by way of reading Port 6 (R6). Refer to Fig. 6-3 (I/O Port and I/O
Control Register Circuit for P60 (/INT)) under Section 6.4 (I/O Ports).
■ EIS is both readable and writable.
Bit 5 (ADIE): ADIF interrupt enable bit
0 = disable ADIF interrupt
1 = enable ADIF interrupt
Bit 4 (CMPIE): CMPIF interrupt enable bit.
0 = disable CMPIF interrupt
1 = enable CMPIF interrupt
Bit 3 (PSWE): Prescaler enable bit for WDT
0 = prescaler disable bit, WDT rate is 1:1
1 = prescaler enable bit, WDT rate is set as Bit 2 ~ Bit 0
Bit 2 ~ Bit 0 (PSW2 ~ PSW0): WDT prescaler bits
PSW2
PSW1
PSW0
WDT Rate
1:2
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
1:4
1:8
1:16
1:32
1:64
1:128
1:256
6.2.11 IOCF0 (Interrupt Mask Register)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
LPWTIE HPWTIE TCCCIE
TCCBIE
TCCAIE
EXIE
ICIE
TCIE
24 •
Product Specification (V1.0) 12.01.2006
(This specification is subject to change without further notice)
ELAN [ ELAN MICROELECTRONICS CORP ]
