EM78P259N/260N
8-Bit Microprocessor with OTP ROM
Bit 4 & Bit 3 (COS1 & COS0): Comparator/OP Select bits
COS1 COS0
Function Description
Comparator and OP not used. P64, P65, and P66 act as
normal I/O pin
0
0
1
1
0
1
0
1
Acts as Comparator and P64 acts as normal I/O pin
Acts as Comparator and P64 acts as Comparator output
pin (CO)
Acts as OP and P64 acts as OP output pin (CO)
Bit 2 (TCCAEN): TCCA enable bit
0 = disable TCCA
1 = enable TCCA as a counter
TCCA signal source
Bit 1 (TCCATS):
Bit 0 (TCCATE):
0 =: internal instruction cycle clock. P61 is a bi-directional I/O pin.
1 = transit through the TCCA pin
TCCA signal edge
0 = increment if transition from low to high takes place on the
TCCA pin
1 = increment if transition from high to low takes place on the
TCCA pin
6.2.5 IOC90 (TCCB and TCCC Control Register)
7
6
5
4
3
2
1
0
TCCBHE TCCBEN TCCBTS TCCBTE
–
TCCCEN TCCCTS TCCCTE
Bit 7 (TCCBHE): Control bit is used to enable the most significant byte of counter
1 = Enable the most significant byte of TCCBH
TCCB is a 16-bit counter
0 = Disable the most significant byte of TCCBH (default value)
TCCB is an 8-bit counter
Bit 6 (TCCBEN): TCCB enable bit
0 = disable TCCB
1 = enable TCCB as a counter
Bit 5 (TCCBTS) TCCB signal source
0 = internal instruction cycle clock. P62 is a bi-directional I/O pin.
1 = transit through the TCCB pin
18 •
Product Specification (V1.0) 06.16.2005
(This specification is subject to change without further notice)