EM78P257
OTP ROM
Fosc
Fosco
I R O U T
start
start
C A S E
1
L o w-time Register
= 3
S o f t w a r e t i m e
Interrupt to CPU
N u m b e r o f p u l s e s
= 3
I R O U T
C A S E
2
Fig. 29 CASE 1 shows a typical long pulse(DP=00;MF=10;HF=1;LGP=1;PWM=0); CASE 2 shows
the same long pulse after being modulated with a frequency of 1/4Fosc
(DP=00;MF=10;HF=1;LGP=1;PWM=0).
Fosc
Fosco
start
I R O U T
H i g h -t i m e R e g i s t e r
= 2
L o w -t i m e R e g i s t e r
= 3
Fig. 30 Continuous pulse train (DP=00;MF=10;HF=0;LGP=0;PWM==1).
4.13 CODE OPTION
EM78P257A/B has one CODE option word and one Customer ID word, which are not a part of the normal
program memory.
Word 0
Bit12~Bit0
Word 1
Bit12~Bit0
Code option12~0
Customer’ s ID
1. Code Option Register (Word 0)
Bit12
Bit11
Bit10
Bit9
Bit8
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
-
/RESETEN
/ENWDT
CLKS OSC2 OSC1 OSC0
/PTB
SUT
TYP
RCOUT
RCM1
RCM0
• Bit 12 (/RESETEN): Define Pin4(EM78P257A) or Pin5(EM78P257B) as a reset pin
0: /RESET enable
1: /RESET disable
• Bit 11 (/ENWDT): Watchdog timer enable bit.
This specification is subject to change without prior notice.
65
07.27.2004 (V1.4)
ELAN [ ELAN MICROELECTRONICS CORP ]
