EM78815
8-Bit Microcontroller
NOTE
Port 70 ~ Port 76's wake-up function is controlled by IOCE Page 0 Bit 0~Bit 6
and ENI instruction. They are falling edge trigger.
Port 77's wake-up function is controlled by IOCE Page 0 Bit 7. It can be
triggered by a falling edge or rising edge (controlled by CONT register).
7.2.16.2 Page 1 Undefined Register: This register is not for use.
7.2.16.3 Page 2 Comparator Control Register
Bit 7
CMPEN CMPREF CMPS1
R/W-0 R/W-0 R/W-0
Bit 6
Bit 5
Bit 4
CMPS0
R/W-0
Bit 3
CMPB3
R/W-0
Bit 2
CMPB2
R/W-0
Bit 1
CMPB1
R/W-0
Bit 0
CMPB0
R/W-0
If user defines Port 63, Port 64 or Port 65 (by ADCS1, ADCS2, ADCS3 at R9 Page 2)
as a comparator input or Port 6, then user can use this register to control the
comparator's function.
Bit 0~Bit 3(CMPB0 ~ CMPB3) : Reference voltage selection of the internal bias
circuit for the comparator.
Reference voltage for comparator = VDD x (N + 0.5) / 16, N = 0 to
15
Bit 4~Bit 5(CMPS0~CMPS1) : Channel selection from CMP1 to CMP3 for
comparator
CMPS1
CMPS0
Input
CMP1
0
0
1
1
0
1
0
1
CMP2
CMP3
Reserved
Bit 6(CMPREF) : Switch for comparator reference voltage type
0 → internal reference voltage
1 → external reference voltage
Bit 7(CMPEN) : Enable control bit of comparator.
0/1 → disable/enable, when CMPEN bit is set to “0” , the 2.0V ref
circuit will be powered off.
The relationship between these registers is shown in Fig.19.
Product Specification (V2.4) 08.01.2004
(This specification is subject to change without further notice)
37
ELAN [ ELAN MICROELECTRONICS CORP ]
