EM78815
8-Bit Microcontroller
Bit 2 (FSKDATA) : FSK decoding data output
It is a read only signal. If the FSK decodes the mark or space signal, it will output a
high level signal or low level signal at this register. It is a raw data type. That means
the decoder just decodes the signal and has no process on the FSK signal. Note that
this should be in normal mode.
User can use FSK data falling edge interrupt function to help in data decoding.
Example:
MOV
IOW
CLR
ENI
:
A,@01000000
IOCF
RF
;enable FSK interrupt function
;wait for FSK data's falling edge
0 = Space data (2200 Hz)
1 = Mark data (1200 Hz)
FSK block power is controlled by R5 Page 3 Bit 3, 4. When PCTRI1=0 and
PCTRL0=1, FSK power is turned on.
The relation between R5 Bit 3 to Bit 4 and RA Bit 1 to Bit 2 are shown in Fig.17. You
have to power up the FSK decoder first, then wait for a setup time (Tsup) and check
carrier signal (/CD). If the carrier is low, the program can process the FSK data.
FIRST RING
2 SECONDS
SECOND RING
2 SECONDS
0.5 SEC
0.5 SEC
FSK signal
Tcdl
TIP/RING
/CD
Tcdh
Tdoc
FSKDATA
DATA
Tsup
PCTRL0
PCTRL1
Fig. 17 Relationship between R5 Bit 3 to Bit 4 and RA Bit 1 to Bit 2
34 •
Product Specification (V2.4) 02.17.2006
(This specification is subject to change without further notice)
ELAN [ ELAN MICROELECTRONICS CORP ]
