EM77950
BB Controller
Bit 7: NET_ID_EN
This is NET_ID control bit.
0: Disables Net ID search.
1: Enables Net ID search according to LCR, NIR.
8.3.5 System Control Register1 (SCR1)
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
This byte is reserved.
Default Value: 0x00.
8.3.6 System Control Register 2 (SCR2)
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
PRE
PRE
PRE
STO TX FIFO RX FIFO SEARCH
SCR2
TX_RX
MASK 2
MASK 1 MASK 0 P RX RESET RESET EN
This register is a read and a write register.
This register controls the system operation modes.
Bit 0: TX_RX
Controls the transceiver mode: receive mode or transmit mode
When TX_RX is low – BB is in receive mode (default mode). The output pin
RX_TX is set to ‘0’. BB searches for a Preamble. If Preamble is found, it
handles the process of receiving a packet.
If SCR3 (7) is set, then the BB goes to RX mode and the output pin RX_TX is
TX mode.
The capacitor discharge can change the output pin RX_TX to TX mode even if
we are in RX mode in the BB. In this case the output pin RX_TX will be in TX
for a short duration and then return to RX mode.
When TX_RX is high – BB is in transmit mode. The output pin RX_TX is set to
‘1’. BB handles the process of transmitting a packet according to the data in
the TX_FIFO. When it finishes transmitting the packet, it automatically goes
back to receive mode.
Product Specification (V1.0) 10.09.2007
(This specification is subject to change without further notice)
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ELAN [ ELAN MICROELECTRONICS CORP ]
