EM77950
BB Controller
Bits 0-2 (RB-0~RB-2): Refresh Bits
These bits determine the maximum number of successive “zero” bytes allowed
before an added “one” bit is stuffed to the packet by the transmitter state
machine. The reason for this feature is to keep the RFW-102 reference
capacitor charged.
Refresh Bit
Bit 2
Bit 1
Bit 0
Refresh bit is added to every byte.
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
Refresh bit is added if 1 byte equals x”00”.
Refresh bit is added if 2 successive bytes equal x”00”.
Refresh bit is added if 3 successive bytes equal x”00”.
Refresh bit is added if 4 successive bytes equal x”00”.
Refresh bit is added if 5 successive bytes equal x”00”.
Refresh bit is added if 6 successive bytes equal x”00”.
Refresh bit is added if 7 successive bytes equal x”00”.
The value of the refresh bit is determined by the value of the reference
capacitor.
Bits 3, 4: CRC [0:1]
These bits control the CRC operation for both transmit and receive mode:
CRC
Bit 4
Bit 3
No CRC
CRC8
0
0
1
1
0
1
0
1
CRC8
CRC16
Bit 5: FIXED
This controls the packet mode when high system packets are fixed size and the
length is specified in the Packet Size Register (PSR).
When FIXED is low, the packet size is variable. The size is specified in the
header of the incoming or outgoing packets. The location of the packet size
field is specified in the LCR register.
Bit 6: NODE_ID_EN
This is NODE_ID control bit.
0: Disables Node ID search.
1: Enables Node ID search according to LCR, BIR.
54 •
Product Specification (V1.0) 10.09.2007
(This specification is subject to change without further notice)
ELAN [ ELAN MICROELECTRONICS CORP ]
