EM25LV010
1 Megabit (128K x 8) Serial Flash Memory
SPECIFICATION
At Power-up, the device is in the following state:
ꢀ
ꢀ
The device is in the Standby mode (not the Deep Power-Down mode).
The Write Enable Latch (WEL) bit is reset.
At Power-down, when VCC drops from the operating voltage to below the POR threshold value
(VWI), all operations are disabled and the device does not respond to any instruction. If a
Power-down occurs while a Write, Program, or Erase cycle is in progress, some data
corruption may occur.
VCC
VCC(max)
Program, Erase and Write Commands are Rejected by the Device
Chip Selection Not Allowed
tPUW
VCC(min)
VWI
Reset State of
the Device
Device Fully
Accessible
tVSL
Read Access Allowed
time
Figure 4: Power-up Timing
Symbol
Parameter
Min
1
Max
Unit
V
VWI
tVSL
tPUW
Write Inhibit Voltage
2
VCC(min) to S# low
10
1
µs
Time Delay to Write Instruction
10
ms
Table 8: Power-Up Timing and VWI Threshold Voltage
This specification is subject to change without further notice. (11.08.2004 V1.0)
Page 19 of 30
ELAN [ ELAN MICROELECTRONICS CORP ]
