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HM51W16165LTT-5 参数 Datasheet PDF下载

HM51W16165LTT-5图片预览
型号: HM51W16165LTT-5
PDF下载: 下载PDF文件 查看货源
内容描述: 16M的EDO DRAM ( 1 - Mword ×16位), 4K的刷新/ 1千刷新 [16 M EDO DRAM (1-Mword x 16-bit) 4 k Refresh/1 k Refresh]
分类和应用: 存储内存集成电路光电二极管动态存储器
文件页数/大小: 35 页 / 598 K
品牌: ELPIDA [ ELPIDA MEMORY ]
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HM51W16165 Series, HM51W18165 Series  
Notes concerning 2CAS control  
Please do not separate the UCAS/LCAS operation timing intentionally. However skew between  
UCAS/LCAS are allowed under the following conditions.  
1. Each of the UCAS/LCAS should satisfy the timing specifications individually.  
2. Different operation mode for upper/lower byte is not allowed; such as following.  
RAS  
Delayed write  
UCAS  
Early write  
LCAS  
WE  
3. Closely separated upper/lower byte control is not allowed. However when the condition (tCP tUL) is  
satisfied, EDO page mode can be performed.  
RAS  
UCAS  
LCAS  
t
UL  
4. Byte control operation by remaining UCAS or LCAS high is guaranteed.  
Data Sheet E0153H10  
17  
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