EDJ1104BBSE, EDJ1108BBSE, EDJ1116BBSE
-GL, -GN
1600
-DG, -DJ
1333
Data rate (Mbps)
Parameter
Symbol
min.
max.
225
min.
max.
250
Unit
ps
Notes
DQS, /DQS low-impedance time
(RL − 1 reference)
12, 13,
14, 37
tLZ (DQS)
−450
−500
DQS, /DQS to DQ skew,
tDQSQ
tCCD
tQH
100
125
ps
12, 13
per group, per access
/CAS to /CAS command delay
DQ output hold time from
DQS, /DQS
4
4
nCK
12, 13,
38
0.38
0.38
tCK (avg)
DQS, /DQS rising edge output
access time from rising CK, /CK
DQS latching rising transitions
to associated clock edges
DQS falling edge hold time from
rising CK
DQS falling edge setup time to
rising CK
12, 13,
tDQSCK
tDQSS
tDSH
−225
−0.27
0.18
225
−255
−0.25
0.2
255
ps
37
0.27
0.25
tCK (avg) 24
tCK (avg) 24, 36
tCK (avg) 24, 36
tDSS
0.18
0.2
DQS input high pulse width
DQS input low pulse width
tDQSH
tDQSL
0.45
0.45
0.55
0.55
0.45
0.45
0.55
0.55
tCK (avg) 34, 35
tCK (avg) 33, 35
12, 13,
tCK (avg)
38
12, 13,
tCK (avg)
38
DQS output high time
tQSH
tQSL
tMRD
0.40
0.40
4
0.40
0.40
4
DQS output low time
Mode register set command
cycle time
nCK
Mode register set command
tMOD
tMOD
tRPRE
15
12
0.9
15
12
0.9
ns
27
27
1, 19,
38
11, 12,
13, 38
update delay
nCK
Read preamble
Read postamble
tCK (avg)
tRPST
0.3
0.3
tCK (avg)
Write preamble
tWPRE
tWPST
tWR
0.9
0.3
15
0.9
0.3
15
tCK (avg) 1
Write postamble
tCK (avg) 1
Write recovery time
ns
26
Auto precharge write recovery
+ precharge time
WR + RU
(tRP/tCK (avg))
WR + RU
(tRP/tCK (avg))
tDAL
nCK
Multi-Purpose register
tMPRR
tRTW
tRTW
tWTR
tWTR
1
1
nCK
29
recovery time
Read to write command delay
(BC4MRS, BC4OTF)
RL + tCCD/2
+ 2nCK − WL
RL + tCCD
+ 2nCK − WL
RL + tCCD/2
+ 2nCK − WL
RL + tCCD
+ 2nCK − WL
(BL8MRS, BL8OTF)
Internal write to read
command delay
18, 26,
27
18, 26,
27
7.5
7.5
ns
4
4
nCK
Internal read to precharge
command delay
tRTP
tRTP
tRAP
7.5
7.5
ns
26, 27
26, 27
28
4
4
nCK
Active to READ with auto
precharge command delay
tRCD min
tRCD min
Data Sheet E1375E50 (Ver. 5.0)
53
ELPIDA [ ELPIDA MEMORY ]
