EDE1104ABSE, EDE1108ABSE, EDE1116ABSE
Auto-Precharge Operation
Before a new row in an active bank can be opened, the active bank must be precharged using either the precharge
command or the auto-precharge function. When a read or a write command is given to the DDR2 SDRAM, the /CAS
timing accepts one extra address, column address A10, to allow the active bank to automatically begin precharge at
the earliest possible moment during the burst read or write cycle. If A10 is low when the read or write Command is
issued, then normal read or write burst operation is executed and the bank remains active at the completion of the
burst sequence. If A10 is high when the Read or Write Command is issued, then the auto-precharge function is
engaged. During auto-precharge, a read Command will execute as normal with the exception that the active bank
will begin to precharge on the rising edge which is /CAS latency (CL) clock cycles before the end of the read burst.
Auto-precharge can also be implemented during Write commands. The precharge operation engaged by the Auto
precharge command will not begin until the last data of the burst write sequence is properly stored in the memory
array.
This feature allows the precharge operation to be partially or completely hidden during burst read cycles (dependent
upon /CAS latency) thus improving system performance for random data access. The /RAS lockout circuit internally
delays the Precharge operation until the array restore operation has been completed so that the auto precharge
command may be issued with any read or write command.
Burst Read with Auto Precharge [READA]
If A10 is high when a Read Command is issued, the Read with Auto-Precharge function is engaged. The DDR2
SDRAM starts an auto Precharge operation on the rising edge which is (AL + BL/2) cycles later from the read with
AP command when tRAS (min.) is satisfied. If tRAS (min.) is not satisfied at the edge, the start point of auto-
precharge operation will be delayed until tRAS (min.) is satisfied. A new bank active (command) may be issued to
the same bank if the following two conditions are satisfied simultaneously.
(1) The /RAS precharge time (tRP) has been satisfied from the clock at which the auto precharge begins.
(2) The /RAS cycle time (tRC) from the previous bank activation has been satisfied.
T0
T1
T2
T3
T4
T5
T6
T7
Tn
/CK
CK
A10 = 1
Posted
READ
NOP
NOP
ACT
Command
ACT
AL + BL/2
DQS, /DQS
≥ tRP
AL = 2
CL = 3
RL = 5
out0 out1 out2 out3
DQ
tRC (min.)
Auto precharge begins
Burst Read with Auto Precharge Followed by an Activation to the Same Bank (tRC limit)
(RL = 5, BL = 4 (AL = 2, CL = 3, tRTP ≤ 2tCK))
Data Sheet E0852E50 (Ver. 5.0)
66
ELPIDA [ ELPIDA MEMORY ]
