EDE1104ABSE, EDE1108ABSE, EDE1116ABSE
Precharge Command [PRE]
The precharge command is used to precharge or close a bank that has been activated. The precharge command is
triggered when /CS, /RAS and /WE are low and /CAS is high at the rising edge of the clock. The precharge
command can be used to precharge each bank independently or all banks simultaneously. Three address bits A10,
BA0, BA1 and BA2 are used to define which bank to precharge when the command is issued.
[Bank Selection for Precharge by Address Bits]
A10
L
BA0
L
BA1
L
BA2
L
Precharged Bank(s)
Bank 0 only
L
H
L
L
L
Bank 1 only
L
H
H
L
L
Bank 2 only
L
H
L
L
Bank 3 only
L
H
H
H
H
×
Bank 4 only
L
H
L
L
Bank 5 only
L
H
H
×
Bank 6 only
L
H
×
Bank 7 only
H
All banks 0 to 7
Remark: H: VIH, L: VIL, ×: VIH or VIL
Burst Read Operation Followed by Precharge
Minimum read to precharge command spacing to the same bank = AL + BL/2 clocks
For the earliest possible precharge, the precharge command may be issued on the rising edge that is
“Additive latency (AL) + BL/2 clocks” after a Read command. A new bank active (command) may be issued to the
same bank after the RAS precharge time (tRP). A precharge command cannot be issued until tRAS is satisfied.
T0
T1
T2
T3
T4
T5
T6
T7
T8
/CK
CK
Posted
READ
ACT
NOP
AL + BL/2 clocks
PRE
NOP
NOP
Command
DQS, /DQS
≥t
RP
AL = 1
CL = 3
RL = 4
out0 out1 out2 out3
DQ
≥t
RAS
Burst Read Operation Followed by Precharge (RL = 4, BL = 4 (AL=1, CL=3))
Data Sheet E0852E50 (Ver. 5.0)
62
ELPIDA [ ELPIDA MEMORY ]
