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EBD21RD4ABNA-7A 参数 Datasheet PDF下载

EBD21RD4ABNA-7A图片预览
型号: EBD21RD4ABNA-7A
PDF下载: 下载PDF文件 查看货源
内容描述: 注册2GB DDR SDRAM DIMM [2GB Registered DDR SDRAM DIMM]
分类和应用: 存储内存集成电路动态存储器双倍数据速率时钟
文件页数/大小: 19 页 / 176 K
品牌: ELPIDA [ ELPIDA MEMORY ]
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EBD21RD4ABNA  
DC Characteristics 1 (TA = 0 to 70°C, VDD, VDDQ = 2.5V 0.2V, VSS = 0V)  
Parameter  
Symbol  
Grade  
max.  
Unit  
mA  
Test condition  
Notes  
1, 2, 9  
-7A, -7B  
-10  
3830  
3550  
CKE VIH,  
tRC = tRC (min.)  
Operating current (ACTV-PRE) IDD0  
Operating current  
IDD1  
-7A, -7B  
-10  
-7A, -7B  
-10  
4190  
3910  
427  
420  
CKE VIH, BL = 4,  
mA  
mA  
mA  
mA  
mA  
mA  
mA  
mA  
mA  
mA  
mA  
1, 2, 5  
4
(ACTV-READ-PRE)  
CL = 3.5, tRC = tRC (min.)  
Idle power down standby current IDD2P  
CKE VIL  
Floating idle  
IDD2F  
-7A, -7B  
-10  
1580  
1390  
CKE VIH, /CS VIH  
DQ, DQS, DM = VREF  
4, 5  
Standby current  
Quiet idle  
Standby current  
-7A, -7B  
-10  
1220  
1210  
CKE VIH, /CS VIH  
DQ, DQS, DM = VREF  
IDD2Q  
4, 10  
3
Active power down standby  
-7A, -7B  
-10  
1040  
1030  
IDD3P  
current  
CKE VIL  
-7A, -7B  
-10  
2480  
2290  
CKE VIH, /CS VIH  
tRAS = tRAS (max.)  
Active standby current  
IDD3N  
IDD4R  
IDD4W  
IDD5  
3, 5, 6  
1, 2, 5, 6  
1, 2, 5, 6  
Operating current  
(Burst read operation)  
-7A, -7B  
-10  
4460  
3820  
CKE VIH, BL = 2,  
CL = 3.5  
Operating current  
(Burst write operation)  
-7A, -7B  
-10  
4460  
3820  
CKE VIH, BL = 2,  
CL = 3.5  
-7A, -7B  
-10  
-7A, -7B  
-10  
6260  
5800  
463  
457  
tRFC = tRFC (min.),  
Input VIL or VIH  
Input VDD – 0.2 V  
Input 0.2 V  
Auto refresh current  
Self refresh current  
IDD6  
Operating current  
(4 banks interleaving)  
-7A, -7B  
-10  
7880  
7240  
IDD7A  
BL = 4  
5, 6, 7  
Notes. 1. These IDD data are measured under condition that DQ pins are not connected.  
2. One bank operation.  
3. One bank active.  
4. All banks idle.  
5. Command/Address transition once per one cycle.  
6. Data/Data mask transition twice per one cycle.  
7. 4 banks active. Only one bank is running at tRC = tRC (min.)  
8. The IDD data on this table are measured with regard to tCK = tCK (min.) in general.  
9. Command/Address transition once per one every two clock cycles.  
10. Command/Address stable at VIH or VIL.  
DC Characteristics 2 (TA = 0 to 70°C, VDD, VDDQ = 2.5V 0.2V, VSS = 0V)  
Parameter  
Symbol  
IL  
min.  
–2  
max.  
2
Unit  
µA  
Test condition  
Notes  
Input leakage current  
Output leakage current  
Output high current  
Output low current  
VDD VIN VSS  
VDDQ VOUT VSS  
VOUT = 1.95V  
IOZ  
–5  
5
µA  
IOH  
IOL  
–15.2  
15.2  
mA  
mA  
VOUT = 0.35V  
Preliminary Data Sheet E0273E20 (Ver. 2.0)  
11  
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