DA14580
FINAL
Bluetooth Low Energy 4.2 SoC
Table 37: WKUP_POL_P0_REG (0x50000112)
Bit
Mode Symbol
R/W WKUP_POL_P0
Description
Reset
7:0
0: enabled input P0x will increment the event counter if that
input goes high
0x0
1: enabled input P0x will increment the event counter if that
input goes low
Table 38: WKUP_POL_P1_REG (0x50000114)
Bit
Mode Symbol
R/W WKUP_POL_P1
Description
Reset
5:0
0: enabled input P1x will increment the event counter if that
input goes high
0x0
1: enabled input P1x will increment the event counter if that
input goes low
Table 39: WKUP_POL_P2_REG (0x50000116)
Bit
Mode Symbol
R/W WKUP_POL_P2
Description
Reset
9:0
0: enabled input P2x will increment the event counter if that
input goes high
0x0
1: enabled input P2x will increment the event counter if that
input goes low
Table 40: WKUP_POL_P3_REG (0x50000118)
Bit
Mode Symbol
R/W WKUP_POL_P3
Description
Reset
7:0
0: enabled input P3x will increment the event counter if that
input goes high
0x0
1: enabled input P3x will increment the event counter if that
input goes low
Table 41: QDEC_CTRL_REG (0x50000200)
Bit
Mode Symbol
Description
Reset
0x0
15:10
9:3
-
-
Reserved
R/W
QD_IRQ_THRES
The number of events on either counter (X or Y) that need to
be reached before an interrupt is generated. If 0 is written,
then threshold is considered to be 1.
0x2
2
1
R
QD_IRQ_STATUS
QD_IRQ_CLR
Interrupt Status. If 1 an interrupt has occured.
0x0
0x0
R/W
Writing 1 to this bit clears the interrupt. This bit is auto-
cleared
0
R/W
QD_IRQ_MASK
0: interrupt is masked
1: interrupt is enabled
0x0
Table 42: QDEC_XCNT_REG (0x50000202)
Bit
Mode Symbol
X_COUNTER
Description
Reset
15:0
R
Contains a signed value of the events. Zero when channel is
disabled
0x0
Datasheet
Revision 3.4
09-Nov-2016
CFR0011-120-01
36 of 155
© 2014 Dialog Semiconductor