DA14580
FINAL
Bluetooth Low Energy 4.2 SoC
Table 5: Register Map
Address
Port
Description
0x50001308
0x50001310
0x50001314
0x50001318
0x5000131C
0x50001320
0x5000132C
0x50001330
0x50001334
0x50001338
0x5000133C
0x50001340
0x50001344
0x50001348
0x5000134C
0x50001350
0x50001354
0x50001358
0x5000135C
0x50001360
0x50001364
0x50001368
0x5000136C
0x50001370
0x50001374
0x50001378
0x5000137C
0x50001380
0x50001394
0x50001398
0x5000139C
0x500013A0
0x50001400
0x50001402
0x50001404
0x50001406
0x50001408
0x5000140C
0x5000140E
0x50001410
0x50001412
0x50001414
0x50001416
0x50001500
I2C_SAR_REG
I2C Slave Address Register
I2C Rx/Tx Data Buffer and Command Register
I2C_DATA_CMD_REG
I2C_SS_SCL_HCNT_REG
I2C_SS_SCL_LCNT_REG
I2C_FS_SCL_HCNT_REG
I2C_FS_SCL_LCNT_REG
I2C_INTR_STAT_REG
Standard Speed I2C Clock SCL High Count Register
Standard Speed I2C Clock SCL Low Count Register
Fast Speed I2C Clock SCL High Count Register
Fast Speed I2C Clock SCL Low Count Register
I2C Interrupt Status Register
I2C_INTR_MASK_REG
I2C_RAW_INTR_STAT_REG
I2C_RX_TL_REG
I2C Interrupt Mask Register
I2C Raw Interrupt Status Register
I2C Receive FIFO Threshold Register
I2C Transmit FIFO Threshold Register
Clear Combined and Individual Interrupt Register
Clear RX_UNDER Interrupt Register
Clear RX_OVER Interrupt Register
Clear TX_OVER Interrupt Register
Clear RD_REQ Interrupt Register
I2C_TX_TL_REG
I2C_CLR_INTR_REG
I2C_CLR_RX_UNDER_REG
I2C_CLR_RX_OVER_REG
I2C_CLR_TX_OVER_REG
I2C_CLR_RD_REQ_REG
I2C_CLR_TX_ABRT_REG
I2C_CLR_RX_DONE_REG
I2C_CLR_ACTIVITY_REG
I2C_CLR_STOP_DET_REG
I2C_CLR_START_DET_REG
I2C_CLR_GEN_CALL_REG
I2C_ENABLE_REG
Clear TX_ABRT Interrupt Register
Clear RX_DONE Interrupt Register
Clear ACTIVITY Interrupt Register
Clear STOP_DET Interrupt Register
Clear START_DET Interrupt Register
Clear GEN_CALL Interrupt Register
I2C Enable Register
I2C_STATUS_REG
I2C Status Register
I2C_TXFLR_REG
I2C Transmit FIFO Level Register
I2C_RXFLR_REG
I2C Receive FIFO Level Register
I2C_SDA_HOLD_REG
I2C_TX_ABRT_SOURCE_REG
I2C_SDA_SETUP_REG
I2C_ACK_GENERAL_CALL_REG
I2C_ENABLE_STATUS_REG
I2C_IC_FS_SPKLEN_REG
GPIO_IRQ0_IN_SEL_REG
GPIO_IRQ1_IN_SEL_REG
GPIO_IRQ2_IN_SEL_REG
GPIO_IRQ3_IN_SEL_REG
GPIO_IRQ4_IN_SEL_REG
GPIO_DEBOUNCE_REG
GPIO_RESET_IRQ_REG
GPIO_INT_LEVEL_CTRL_REG
KBRD_IRQ_IN_SEL0_REG
KBRD_IRQ_IN_SEL1_REG
KBRD_IRQ_IN_SEL2_REG
GP_ADC_CTRL_REG
I2C SDA Hold Time Length Register
I2C Transmit Abort Source Register
I2C SDA Setup Register
I2C ACK General Call Register
I2C Enable Status Register
I2C SS and FS spike suppression limit Size
GPIO interrupt selection for GPIO_IRQ0
GPIO interrupt selection for GPIO_IRQ1
GPIO interrupt selection for GPIO_IRQ2
GPIO interrupt selection for GPIO_IRQ3
GPIO interrupt selection for GPIO_IRQ4
debounce counter value for GPIO inputs
GPIO interrupt reset register
high or low level select for GPIO interrupts
GPIO interrupt selection for KBRD_IRQ for P0
GPIO interrupt selection for KBRD_IRQ for P1 and P2
GPIO interrupt selection for KBRD_IRQ for P3
General Purpose ADC Control Register
Datasheet
Revision 3.4
09-Nov-2016
CFR0011-120-01
22 of 155
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