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DR80390_1 参数 Datasheet PDF下载

DR80390_1图片预览
型号: DR80390_1
PDF下载: 下载PDF文件 查看货源
内容描述: 高性能8位微控制器版本3.10 [High Performance 8-bit Microcontroller ver 3.10]
分类和应用: 微控制器
文件页数/大小: 8 页 / 117 K
品牌: DCD [ DIGITAL CORE DESIGN ]
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PERFORMANCE
The following tables give a survey about the
Core area and performance in ASICs Devices
(CPU features and peripherals have been in-
cluded):
Device
0.25u typical
0.25u typical
Optimization
area
speed
F
max
100 MHz
250 MHz
45000
40000
35000
30000
25000
20000
15000
10000
5000
0
268
1550
40125
Core performance in ASIC devices
For a user the most important is application
speed improvement. The most commonly used
arithmetic functions and their improvements
are shown in table below. An improvement was
computed as {80C51 clock periods} divided by
{DR80390 clock periods} required to execute
an identical function. More details are available
in core documentation.
Function
8-bit addition (immediate
data)
8-bit addition (direct
addressing)
8-bit addition (indirect
addressing)
8-bit addition (register
addressing)
8-bit subtraction (immediate
data)
8-bit subtraction (direct
addressing)
8-bit subtraction (indirect
addressing)
8-bit subtraction (register
addressing)
8-bit multiplication
8-bit division
16-bit addition
16-bit subtraction
16-bit multiplication
32-bit addition
32-bit subtraction
32-bit multiplication
Average speed improvement:
Improvement
7,20
6,00
6,00
7,20
7,20
6,00
6,00
7,20
10,67
9,60
7,20
7,64
9,75
7,20
7,43
9,04
7,58
80C51 (12MHz)
80C310 (33MHz)
DR80390 (250MHz)
Area utilized by the each unit of DR80390 core
in vendor specific technologies is summarized
in table below.
Component
CPU*
Interrupt Controller
Power Management Unit
I/O ports
Timers
UART0
Total area
Area
[Gates]
[FFs]
5500
450
50
400
550
650
7600
250
40
5
35
50
60
430
*CPU – consisted of ALU, Opcode Decoder, Control Unit, Program &
Internal & External Memory Interfaces, User SFRs Interface
Core components area utilization
Dhrystone Benchmark Version 2.1 was used to
measure Core performance. The following ta-
ble gives a survey about the DR80390 per-
formance in terms of Dhrystone/sec and VAX
MIPS rating.
Device
80C51
80C310
DR80390
Target
-
-
0.25u
Clock
frequency
12 MHz
33 MHz
250 MHz
Dhry/sec
(VAX MIPS)
268 (0.153)
1550 (0.882)
40125 (22.837)
Core performance in terms of Dhrystones
All trademarks mentioned in this document
are trademarks of their respective owners.
http://www.DigitalCoreDesign.com
http://www.dcd.pl
Copyright 1999-2003 DCD – Digital Core Design. All Rights Reserved.