○ Netlist
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port0o(7:0)
port0i(7:0)
port1i(7:0)
port2i(7:0)
port3i(7:0)
port1o(7:0)
port2o(7:0)
port3o(7:0)
D E S I G N F E A T U R E S
♦
PROGRAM MEMORY:
prgaddr(15:0)
prgdatao(7:0)
prgramwr
ramdatai(7:0)
sfrdatai(7:0)
The DP80390 soft core is dedicated for
operation with Internal and External Pro-
gram Memory. It maximal linear size is
equal to 8 MB. Internal Program Memory
can be implemented as:
prgromdata(7:0)
prgramdata(7:0)
xaddr(23:0)
xdatao(7:0)
xdataz
○ ROM located in address range between
xdatai(7:0)
ready
0x0000 ÷ (ROMsize-1)
○ RAM located in address range between
(64kB-RAMsize) ÷ 0xFFFF
External Program Memory can be im-
plemented as ROM or RAM located in ad-
dress range between ROMsize ÷ 8 MB ex-
cluding area occupied by RAMsize
xprgrd
xprgwr
xdatard
xdatawr
iprgromsize(2:0)
iprgramsize(2:0)
sxdmadd(15:0)
sxdmdatao(7:0)
sxdmwe
sxdmxdatai(7:0)
.
sxdmoe
int0
int1
int2
int3
int4
int5
int6
♦
♦
♦
INTERNAL DATA MEMORY:
ramaddr(7:0)
ramdatao(7:0)
ramwe
The DP80390XP can address Internal
Data Memory of up to 256 bytes The Inter-
nal Data Memory can be implemented as
Single-Port synchronous RAM.
ramoe
sfraddr(7:0)
sfrdatao(7:0)
sfroe
EXTERNAL DATA MEMORY:
The DP80390XP soft core can address
up to 16 MB of External Data Memory. Ex-
tra DPX (Data Pointer eXtended) register is
used for segments swapping.
t0
gate0
t1
gate1
t2
t2ex
sfrwe
stop
pmm
USER SPECIAL FUNCTION REGISTERS:
Up to 60 External (user) Special Func-
tion Registers (ESFRs) may be added to
the DP80390XP design. ESFRs are mem-
ory mapped into Direct Memory between
addresses 0x80 and 0xFF in the same
manner as core SFRs and may occupy any
address that is not occupied by a core
SFR.
rxd0o
txd0
capture0
capture1
capture2
capture3
rxd1o
txd1
sclhs
sclo
sdao
rxd0i
rxd1i
scli
sdai
sso(7:0)
♦
WAIT STATES SUPPORT:
The DP80390XP soft core is dedicated
for operation with wide range of Program
and Data memories. Slow Program and Ex-
ternal Data memory may assert a memory
Wait signal to hold up CPU activity.
so
mo
scko
scken
soen
ss
si
mi
scki
coderun
debugacs
reset
clk
rsto
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