DM9016
3-port switch with Processor Interface
8.6 Auto-negotiation Link Partner Ability Register (ANLPAR) – 05H
This register contains the advertised abilities of the link partner when received during Auto-negotiation.
Bit
Bit Name
Default
Description
15
NP
0, RO
Next Page Indication
0 = Link partner, no next page available
1 = Link partner, next page available
14
ACK
0, RO
Acknowledge
0 = Not acknowledged
1 = Link partner ability data reception acknowledged
The DM9016's auto-negotiation state machine will automatically
control this bit from the incoming FLP bursts. Software should not
attempt to write to this bit
13
RF
0, RO
Remote Fault
0 = No remote fault indicated by link partner
1 = Remote fault indicated by link partner
Reserved
Read as 0, ignore on write
Flow Control Support
12-11
10
Reserved
FCS
0, RO
0, RO
0 = Controller chip doesn’t support flow control ability by link
partner
1 = Controller chip supports flow control ability by link partner
100BASE-T4 Support
0 = 100BASE-T4 is not supported by the link partner
1 = 100BASE-T4 is supported by the link partner
100BASE-TX Full Duplex Support
0 = 100BASE-TX full duplex is not supported by the link partner
1 = 100BASE-TX full duplex is supported by the link partner
100BASE-TX Support
0 = 100BASE-TX half duplex is not supported by the link partner
1 = 100BASE-TX half duplex is supported by the link partner
10BASE-T Full Duplex Support
0 = 10BASE-T full duplex is not supported by the link partner
1 = 10BASE-T full duplex is supported by the link partner
10BASE-T Support
0 = 10BASE-T half duplex is not supported by the link partner
1 = 10BASE-T half duplex is supported by the link partner
9
8
T4
0, RO
0, RO
0, RO
0, RO
0, RO
TX_FDX
TX_HDX
10_FDX
10_HDX
Selector
7
6
5
4-0
<00000>, RO Protocol Selection Bits
Link partner’s binary encoded protocol selector
54
Preliminary datasheet
DM9016-13-DS-P01
March 26, 2009
DAVICOM [ DAVICOM SEMICONDUCTOR, INC. ]
