DM9016
3-port switch with Processor Interface
selected by auto-negotiation
7
Collision test
Reserved
0,RW
0,RO
Collision Test
0 = Normal operation
1 = Collision test enabled. When set, this bit will cause the COL
signal to be asserted in response to the assertion of TX_EN in
internal MII interface.
6-0
Reserved
Read as 0, ignore on write
8.2 Basic Mode Status Register (BMSR) – 01H
Bit
Bit Name
Default
Description
15
100BASE-T4
0,RO/P 100BASE-T4 Capable
0 = not able to perform in 100BASE-T4 mode
1 = able to perform in 100BASE-T4 mode
14
13
12
11
100BASE-TX
full-duplex
1,RO/P 100BASE-TX Full Duplex Capable
0 = not able to perform 100BASE-TX in full duplex mode
1 = able to perform 100BASE-TX in full duplex mode
1,RO/P 100BASE-TX Half Duplex Capable
0 = not able to perform 100BASE-TX in half duplex mode
1 = able to perform 100BASE-TX in half duplex mode
1,RO/P 10BASE-T Full Duplex Capable
0 = not able to perform 10BASE-TX in full duplex mode
1 = able to perform 10BASE-T in full duplex mode
1,RO/P 10BASE-T Half Duplex Capable
100BASE-TX
half-duplex
10BASE-T
full-duplex
10BASE-T
half-duplex
0 = not able to perform 10BASE-T in half duplex mode
1 = able to perform 10BASE-T in half duplex mode
10-7
6
Reserved
0,RO
1,RO
Reserved
Read as 0, ignore on write
MII Frame Preamble Suppression
0 = not accept management frames with preamble suppressed
1 = accept management frames with preamble suppressed
Auto-negotiation Complete
0 = Auto-negotiation process not completed
1 = Auto-negotiation process completed
Remote Fault
MF preamble
suppression
5
4
Auto-negotiation
Complete
0,RO
Remote fault
0, RO
0 = No remote fault condition detected
1 = Remote fault condition detected (cleared on read or by a chip
reset). Fault criteria and detection method is DM9016
implementation specific. This bit will set after the RF bit in the
ANLPAR (bit 13, register address 05) is set
3
Auto-negotiation
ability
1,RO/P Auto Configuration Ability
0 = not able to perform auto-negotiation
Preliminarydatasheet
DM9016-13-DS-P01
March 26, 2009
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