DM9010BI
Industrial-temperature Single Chip Ethernet Controller with General Processor Interface
6.32 General Purpose Control Register 2 (34H)
Bit
Name
Default
Description
7~0
GPC2
HP0,RW General Purpose Control 2
Define the input/output direction of pins SD23~16, which are used as general
purpose pins when none 32-bit mode and external MII mode, respectively.
6.33 General Purpose Register 2 (35H)
Bit
Name
Default
Description
7~0
GPD2
HP0,RW General Purpose Register 2 Data
When the correspondent bit of General Purpose Control Register 2 is set, the value
of the bit is reflected to pin SD23~16
When the correspondent bit of General Purpose Control Register 2 is 0, the value
of the bit to be read is reflected from correspondent pins SD23~16
6.34 General Purpose Control Register 3 (36H)
Bit
Name
Default
Description
7~0
GPC3
HP0,RW General Purpose Control 3
Define the input/output direction of pins SD31~24, which are used as general
purpose pins when none 32-bit mode and external MII mode, respectively.
6.35 General Purpose Register 3 (37H)
Bit
Name
Default
Description
7~0
GPD3
HP0,RW General Purpose Register 3 Data
When the correspondent bit of General Purpose Control Register 3 is set, the value
of the bit is reflected to pin SD31~24
When the correspondent bit of General Purpose Control Register 3 is 0, the value
of the bit to be read is reflected from correspondent pins SD31~24
6.36 Processor Bus Control Register (38H)
Bit
Name
Default
Description
7
Reserved
P0,RW
Reserved
Data Bus Current Driving/Sinking Capability
00: 2mA (default)
6:5
CURR
P00,RW
01: 4mA
10: 6mA
11: 8mA
4
3
2
1
Reserved
GPIO
P0,RW
P0,RW
P0,RW
P0,RW
Reserved
Enable Schmitt Trigger
1: Pin 35/36/37 (IOR/IOW/CS#) have Schmitt trigger capability.
Reserved
Eliminate IOW spike
1: eliminate about 2ns IOW spike
Reserved
IOW_SPIKE
Eliminate IOR spike
1: eliminate about 2ns IOR spike
0
IOR_SPIKE
P1,RW
Preliminary
25
Version: DM9010BI--DS-P01
January 12, 2010
DAVICOM [ DAVICOM SEMICONDUCTOR, INC. ]
