DM562P
V.90 Integrated Data/ Fax/Voice/Speakerphone
Modem Device Single Chip with Memory Built in
Capabilities Pointer (Xxxxxx34 - Cap _Ptr)
Cap_Ptr
0 1 0 1 0 0 0 0 Offset 34H
7
0
Bit
Default
Type
Description
31:8
000000h
RO
Reserved
7:0
01010000
RO
Capability Pointer
The Cap_Ptr provides an offset (default is 50h) into the function’s PCI
Configuration Space for the location of the first term in the Capabilities
Linked List. The Cap_Ptr offset is DOUBLE WORD aligned so the two least
significant bits significant bits are always “0”s
Interrupt & Latency Configuration (Xxxxxx3c - PCIINT)
31
24 23
16 15
8
7
0
MAX_LAT
MIN_GNT
INT_PIN
INT_LINE
Maximum Latency Timer
Minimum Grant
Interrupt Pin
Interrupt Line
Bit
Default
Type
Description
31:24
28h
RO
Maximum Latency Timer that can be sustained (Read Only and Read As
28h)
23:16
14h
RO
Minimum Grant
Minimum Length of a Burst Period (Read Only and Read As 14h)
Interrupt Pin read as 01h to indicate INTA#
Interrupt Line that Is Routed to the Interrupt Controller
15:8
7:0
01h
XXh
RO
RW
30
Final
Version: DM562P-DS-F01
February 02, 2004