DM562P
V.90 Integrated Data/ Fax/Voice/Speakerphone
Modem Device Single Chip with Memory Built in
Power Management Register (Xxxxxx50h~PMR)
31
16 15
8
7
0
PMC
Next Item Pointer
Capability ID
Power Management Capabilities
Next Item Pointer
Capability Identifier
Bit
31:27
Default
00000
Type
RO
Description
PME_Support
_WR
This five-bit field indicates the power states in which the function may
assert PME#. A value of 0 for any bit indicates that the function is not
capable of asserting the PME# signal while in that power state.
bit27 Æ PME# support D0
bit28 Æ PME# support D1
bit29 Æ PME# support D2
bit30 Æ PME# support D3(hot)
bit31 Æ PME# support D3(cold)
DM6588’s bit31~27=11000 indicates PME# can be asserted from D3(hot)
& D(cold).
26:22
21
00000
RO
RO
RO
Reserved (DM6588 not supports D1, D2)
0
1
A “1” indicates that the function requires a device specific initialization
sequence following transition to the D0 uninitialized state.
Auxiliary Power Source
20
This bit is only meaningful if bit31 is a “1”.
This bit is “1” in DM6588 indicates that support for PME# in D3(cold)
requires auxiliary power.
19
18:16
15:8
7:0
0
RO
RO
RO
RO
PME# Clock
“0” indicates that no PCI clock is required for the function to generate
PME#.
Version
A value of 001 indicates that this function complies with the Revision 1.0 of
the PCI Power Management Interface Specification.
Next Item Pointer
The offset into the function’s PCI Configuration Space pointing to the
location of next item in the function’s capability list is “00h”
Capability Identifier
001
00h
01h
When “01h” indicates the linked list item as being the PCI Power
Management Registers.
Final
31
Version: DM562P-DS-F01
February 02, 2004
DAVICOM [ DAVICOM SEMICONDUCTOR, INC. ]
