DM562P
V.90 Integrated Data/ Fax/Voice/Speakerphone
Modem Device Single Chip with Memory Built in
Configuration Register Structure
00H
04H
08H
0CH
10H
14H
18H
1CH
20H
24H
28H
2CH
30H
34H
38H
Vendor ID
Command
Device ID
Status (with bit 4 set to 1)
Revisio
Class Code = 070002
Header Type
BIST
Latency Timer
Cach Line Size
Bass Address Register CBIO
Reserved
Reserved
Subsystem ID
Reserved
Min_Gnt
Subsystem Vendor ID
Reserved
Reserved
Cap_Ptr
Max_Lat
Interrupt Pin = 1
Reserved
Reserved
Interrupt Line
3CH
40H
44H
48H
4CH
Power Management Capability
Reserved
Capability ID
Next Item Pointer
50H
54H
Power Management Control and Status
Key to Default
In the register description that follows, the default
column takes the form <Reset Value>
Where：
<Access Type>:
RO = Read only
RW = Read/Write
<Reset Value>:
1
0
X
Bit set to logic one
Bit set to logic zero
No default value
R/C: means Read / Write & Write "1" for Clear.
_WR = Controller Write
_RD = Controller Read
24
Final
Version: DM562P-DS-F01
February 02, 2004
DAVICOM [ DAVICOM SEMICONDUCTOR, INC. ]
