DM562P
V.90 Integrated Data/ Fax/Voice/Speakerphone
Modem Device Single Chip with Memory Built in
11. PCI Configuration Register Definition
The definitions of PCI Configuration Registers are
based on the PCI specification revision 2.1 and
provides the initialization and configuration
information to operate the PCI interface in the
DM6588. All registers can be accessed with byte,
word, or double word mode. As defined in PCI
specification 2.1, read accesses to reserve or
unimplemented registers will return a value of “0.”
These registers are to be described in the following
sections.
PCI Configuration Registers Mapping :
Description
Identifier
Address
Value of Reset
Offset
00H
Identification
PCIID
6588A1282H
04100001H
Command & Status
Revision
PCICS
PCIRV
PCILT
PCIIO
04H
08H
07000210H
Miscellaneous
0CH
10H
00000000H
I/O Base Address
Reserved
XXXXXXXx001
--------
14H - 28H
2CH
34H
Subsystem Identification
Capability Pointer
Reserved
PCISID
CAP_PTR
--------
undefined
00000050H
38H
Interrupt & Latency
Power Management Register
Power Management Control &
Status
PCIINT
PMR
3CH
50H
281401XXH
00110001H
00000000H
PMCSR
54H
Final
23
Version: DM562P-DS-F01
February 02, 2004
DAVICOM [ DAVICOM SEMICONDUCTOR, INC. ]
