DS2152
11.1.3 Basic Operation Details
To allow the DS2152 to properly source/receive data from/to the HDLC and BOC controller the legacy
FDL circuitry (which is described in Section 11.2) should be disabled and the following bits should be
programmed as shown:
TCR1.2 = 1 (source FDL data from the HDLC and BOC controller)
TBOC.6 = 1 (enable HDLC and BOC controller)
CCR2.5 = 0 (disable SLC-96 and D4 Fs-bit insertion)
CCR2.4 = 0 (disable legacy FDL 0 stuffer)
CCR2.1 = 0 (disable SLC-96 reception)
CCR2.0 = 0 (disable legacy FDL 0 stuffer)
IMR2.4 = 0 (disable legacy receive FDL buffer full interrupt)
IMR2.3 = 0 (disable legacy transmit FDL buffer empty interrupt)
IMR2.2 = 0 (disable legacy FDL match interrupt)
IMR2.1 = 0 (disable legacy FDL abort interrupt)
As a basic guideline for interpreting and sending both HDLC messages and BOC messages, the following
sequences can be applied:
Receive a HDLC Message or a BOC
1. enable RBOC and RPS interrupts
2. wait for interrupt to occur
3. if RBOC=1, then follow steps 5 and 6
4. if RPS=1, then follow steps 7 thru 12
5. if LBD=1, a BOC is present, then read the code from the RBOC register and take action as needed
6. if BD=0, a BOC has ceased, take action as needed and then return to step 1
7. disable RPS interrupt and enable either RPE, RNE, or RHALF interrupt
8. read RPRM to obtain REMPTY status
a. if REMPTY=0, then record OBYTE, CBYTE, and POK bits and then read the FIFO
a1. if CBYTE=0 then skip to step 9
a2. if CBYTE=1 then skip to step 11
b. if REMPTY=1, then skip to step 10
9. repeat step 8
10. wait for interrupt, skip to step 8
11. if POK=0, then discard whole packet, if POK=1, accept the packet
12. disable RPE, RNE, or RHALF interrupt, enable RPS interrupt and return to step 1
Transmit a HDLC Message
1. make sure HDLC controller is finished sending any previous messages and is currently sending flags
by checking that the FIFO is empty by reading the TEMPTY status bit in the TPRM register
2. enable either the THALF or TNF interrupt
3. read TPRM to obtain TFULL status
a. if TFULL=0, then write a byte into the FIFO and skip to next step (special case occurs when the
last byte is to be written, in this case set TEOM=1 before writing the byte and then skip to step 6)
b. if TFULL=1, then skip to step 5
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