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SL811HST-AXC 参数 Datasheet PDF下载

SL811HST-AXC图片预览
型号: SL811HST-AXC
PDF下载: 下载PDF文件 查看货源
内容描述: 嵌入式USB主/从控制器 [Embedded USB Host/Slave Controller]
分类和应用: 控制器
文件页数/大小: 32 页 / 617 K
品牌: CYPRESS [ CYPRESS ]
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SL811HS  
USB Host Controller Pins Description  
The SL811HST-AXC is packaged in a 48-pin TQFP. These devices require a 3.3 VDC power source and an external 12 or 48 MHz  
crystal or clock..  
Table 34. Pin and Signal Description for Pins  
48-Pin TQFP  
Pin Type  
Pin Name  
Pin Description  
AXC Pin No.  
1
2
3
NC  
NC  
IN  
NC  
NC  
No connection.  
No connection.  
nWR  
Write Strobe Input. An active LOW input used with nCS to write to  
registers/data memory.  
4
IN  
nCS  
Active LOW 48-Pin TQFP Chip select. Used with nRD and nWr when  
accessing the 48-Pin TQFP.  
5[5]  
6
IN  
VDD1  
BIDIR  
BIDIR  
GND  
NC  
CM  
+3.3 VDC  
DATA +  
DATA -  
USB GND  
NC  
Clock Multiply. Select 12 MHz/48 MHz Clock Source.  
Power for USB Transceivers. VDD1 may be connected to VDD  
USB Differential Data Signal HIGH Side.  
USB Differential Data Signal LOW Side.  
Ground Connection for USB.  
No connection.  
.
7
8
9
10  
11  
12  
13  
14  
15[6]  
16  
NC  
NC  
No connection.  
NC  
NC  
No connection.  
NC  
NC  
No connection.  
NC  
NC  
No connection.  
VDD  
IN  
+3.3 VDC  
CLK/X1  
Device VDD Power.  
Clock or External Crystal X1 connection. The X1/X2 Clock requires external  
12 or 48 MHz matching crystal or clock source.  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
29  
30  
31  
32  
OUT  
IN  
X2  
nRST  
INTRQ  
GND  
D0  
External Crystal X2 connection.  
Device active low reset input.  
Active HIGH Interrupt Request output to external controller.  
Device Ground.  
OUT  
GND  
BIDIR  
NC  
Data 0. Microprocessor Data/Address Bus.  
No connection.  
NC  
NC  
NC  
No connection.  
NC  
NC  
No connection.  
NC  
NC  
No connection.  
NC  
NC  
No connection.  
BIDIR  
BIDIR  
BIDIR  
GND  
BIDIR  
BIDIR  
D1  
Data 1. Microprocessor Data/Address Bus.  
Data 2. Microprocessor Data/Address Bus.  
Data 3. Microprocessor Data/Address Bus.  
Device Ground.  
D2  
D3  
GND  
D4  
Data 4. Microprocessor Data/Address Bus.  
Data 5. Microprocessor Data/Address Bus.  
D5  
Notes  
5. The CM Clock Multiplier pin must be tied HIGH for a 12 MHz clock source and tied to ground for a 48 MHz clock source.  
6. VDD can be derived from the USB supply. See Figure 5 on page 20.  
Document 38-08008 Rev. *F  
Page 21 of 32  
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