CY8C27143, CY8C27243
CY8C27443, CY8C27543, CY8C27643
48-Pin Part Pinout
Table 7. 48-Pin Part Pinout (SSOP)
Pin
No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
IO
IO
IO
IO
IO
IO
IO
I
I
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
Input
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
Power
Type
Digital
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
Power
I
I
Ana-
log
I
IO
IO
I
Pin
Name
P0[7]
P0[5]
P0[3]
P0[1]
P2[7]
P2[5]
P2[3]
P2[1]
P4[7]
P4[5]
P4[3]
P4[1]
SMP
P3[7]
P3[5]
P3[3]
P3[1]
P5[3]
P5[1]
P1[7]
P1[5]
P1[3]
P1[1]
Vss
P1[0]
P1[2]
P1[4]
P1[6]
P5[0]
P5[2]
P3[0]
P3[2]
P3[4]
P3[6]
XRES
P4[0]
P4[2]
P4[4]
P4[6]
P2[0]
P2[2]
P2[4]
Figure 7. CY8C27643 48-Pin PSoC Device
Description
Analog column mux input.
Analog column mux input and column
output.
Analog column mux input and column
output.
Analog column mux input.
A, I, P0[7]
A, IO, P0[5]
A, IO, P0[3]
A, I, P0[1]
P2[7]
P2[5]
A, I, P2[3]
A, I, P2[1]
P4[7]
P4[5]
P4[3]
P4[1]
SMP
P3[7]
P3[5]
P3[3]
P3[1]
P5[3]
P5[1]
I2CSCL, P1[7]
I2CSDA, P1[5]
P1[3]
I2CSCL,XTALin,P1[1]
Vss
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
Direct switched capacitor block input.
Direct switched capacitor block input.
SSOP
Switch Mode Pump (SMP) connection
to external components required.
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
Vdd
P0[6], A, I
P0[4], A, IO
P0[2], A, IO
P0[0], A, I
P2[6],External VRef
P2[4],External AGND
P2[2], A, I
P2[0], A, I
P4[6]
P4[4]
P4[2]
P4[0]
XRES
P3[6]
P3[4]
P3[2]
P3[0]
P5[2]
P5[0]
P1[6]
P1[4],EXTCLK
P1[2]
P1[0],XTALout,I2C
SDA
I2C Serial Clock (SCL).
I2C Serial Data (SDA).
Crystal Input (XTALin), I2C Serial Clock
(SCL), ISSP-SCLK*.
Ground connection.
Crystal Output (XTALout), I2C Serial
Data (SDA), ISSP-SDATA.*
Optional External Clock Input
(EXTCLK).
Active high external reset with internal
pull down.
Direct switched capacitor block input.
Direct switched capacitor block input.
External Analog Ground (AGND).
Document Number: 38-12012 Rev. *M
Page 11 of 53
CYPRESS [ CYPRESS SEMICONDUCTOR ]
