CY8C27143, CY8C27243
CY8C27443, CY8C27543, CY8C27643
Pinouts
The CY8C27x43 PSoC device is available in a variety of packages which are listed and illustrated in the following tables. Every port
pin (labeled with a “P”) is capable of Digital IO. However, Vss, Vdd, SMP, and XRES are not capable of Digital IO.
8-Pin Part Pinout
Table 3. Pin Definitions - 8-Pin PDIP
Pin
No.
1
2
3
4
5
6
7
8
IO
IO
IO
Power
IO
IO
Type
Digital
IO
IO
IO
Power
Analog
IO
IO
Pin
Name
P0[5]
P0[3]
P1[1]
Vss
P1[0]
P0[2]
P0[4]
Vdd
Description
Analog column mux input and column output.
Analog column mux input and column output.
Crystal Input (XTALin), I2C Serial Clock (SCL),
ISSP-SCLK*.
Ground connection.
Crystal Output (XTALout), I2C Serial Data (SDA),
ISSP-SDATA*.
Analog column mux input and column output.
Analog column mux input and column output.
Supply voltage.
Figure 3. CY8C27143 8-Pin PSoC Device
A, IO, P0[5]
A, IO, P0[3]
I2CSCL,XTALin, P1[1]
Vss
1
8
2
PDIP
7
3
6
4
5
Vdd
P0[4], A, IO
P0[2], A, IO
P1[0],XTALout,I2CSDA
LEGEND:
A = Analog, I = Input, and O = Output.
* These are the ISSP pins, which are not High Z at POR (Power On Reset). See the
PSoC Programmable System-on-Chip Technical Reference
Manual
for details.
20-Pin Part Pinout
Table 4. Pin Definitions - 20-Pin SSOP, SOIC
Pin
No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
IO
IO
IO
IO
Power
IO
IO
IO
IO
Input
I
IO
IO
I
IO
IO
IO
IO
Power
Type
Digital
IO
IO
IO
IO
Power
Analog
I
IO
IO
I
Pin
Name
P0[7]
P0[5]
P0[3]
P0[1]
SMP
P1[7]
P1[5]
P1[3]
P1[1]
Vss
P1[0]
P1[2]
P1[4]
P1[6]
XRES
P0[0]
P0[2]
P0[4]
P0[6]
Vdd
Description
Analog column mux input.
Analog column mux input and column output.
Analog column mux input and column output.
Analog column mux input.
Switch Mode Pump (SMP) connection to external
components required.
I2C Serial Clock (SCL).
I2C Serial Data (SDA).
Crystal Input (XTALin), I2C Serial Clock (SCL),
ISSP-SCLK*.
Ground connection.
Crystal Output (XTALout), I2C Serial Data (SDA),
ISSP-SDATA*.
Optional External Clock Input (EXTCLK).
Active high external reset with internal pull down.
Analog column mux input.
Analog column mux input and column output.
Analog column mux input and column output.
Analog column mux input.
Supply voltage.
Figure 4. CY8C27243 20-Pin PSoC Device
A, I, P0[7]
A, IO, P0[5]
A, IO, P0[3]
A, I, P0[1]
SMP
I2CSCL,P1[7]
I2CSDA, P1[5]
P1[3]
I2CSCL,XTALin, P1[1]
Vss
1
2
3
4
5
6
7
8
9
10
SSOP
SOIC
20
19
18
17
16
15
14
13
12
11
Vdd
P0[6], A, I
P0[4], A, IO
P0[2], A, IO
P0[0], A, I
XRES
P1[6]
P1[4],EXTCLK
P1[2]
P1[0],XTALout,I2CSDA
LEGEND:
A = Analog, I = Input, and O = Output.
* These are the ISSP pins, which are not High Z at POR (Power On Reset). See the
PSoC Programmable System-on-Chip Technical Reference Manual
for details.
Document Number: 38-12012 Rev. *M
Page 8 of 53
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