CY7C68013A, CY7C68014A
CY7C68015A, CY7C68016A
9. AC Electrical Characteristics
9.1 USB Transceiver
USB 2.0 compliant in full speed and high speed modes.
9.2 Program Memory Read
Figure 9-1. Program Memory Read Timing Diagram
t
CL
CLKOUT
t
AV
A[15..0]
t
STBL
PSEN#
t
STBH
t
AV
D[7..0]
t
SOEL
OE#
t
SCSL
CS#
t
ACC1
data in
t
DH
Table 14. Program Memory Read Parameters
Parameter
t
CL
Description
1/CLKOUT Frequency
Min
–
–
–
t
AV
t
STBL
t
STBH
t
SOEL
t
SCSL
t
DSU
t
DH
Delay from Clock to Valid Address
Clock to PSEN Low
Clock to PSEN High
Clock to OE Low
Clock to CS Low
Data Setup to Clock
Data Hold Time
0
0
0
–
–
9.6
0
Typ
20.83
41.66
83.2
–
–
–
–
–
–
–
Max
–
–
–
10.7
8
8
11.1
13
–
–
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
48 MHz
24 MHz
12 MHz
–
–
–
–
–
–
–
Notes
17. CLKOUT is shown with positive polarity.
18. t
ACC1
is computed from these parameters as follows:
t
ACC1
(24 MHz) = 3*t
CL
– t
AV
– t
DSU
= 106 ns.
t
ACC1
(48 MHz) = 3*t
CL
– t
AV
– t
DSU
= 43 ns.
Document #: 38-08032 Rev. *V
Page 39 of 66
CYPRESS [ CYPRESS SEMICONDUCTOR ]
