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CY7C68013A-56BAXCT 参数 Datasheet PDF下载

CY7C68013A-56BAXCT图片预览
型号: CY7C68013A-56BAXCT
PDF下载: 下载PDF文件 查看货源
内容描述: EZ- USB FX2LP USB微控制器,高速USB外设控制器 [EZ-USB FX2LP USB Microcontroller High-Speed USB Peripheral Controller]
分类和应用: 微控制器
文件页数/大小: 66 页 / 909 K
品牌: CYPRESS [ CYPRESS ]
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CY7C68013A, CY7C68014A  
CY7C68015A, CY7C68016A  
EZ-USB® FX2LP™ USB Microcontroller  
High-Speed USB Peripheral Controller  
EZ-USB FX2LP™ USB Microcontroller High Speed USB Peripheral Controller  
Features  
USB 2.0 USB IF high speed certified (TID # 40460272)  
3.3 V operation with 5 V tolerant inputs  
Single chip integrated USB 2.0 transceiver, smart SIE, and  
Vectored USB interrupts and GPIF/FIFO interrupts  
enhanced 8051 microprocessor  
Separate data buffers for the setup and data portions of a  
Fit, form, and function compatible with the FX2  
Pin compatible  
Object code compatible  
CONTROL transfer  
Integrated I2C controller, runs at 100 or 400 kHz  
Four integrated FIFOs  
Functionally compatible (FX2LP is a superset)  
Integrated glue logic and FIFOs lower system cost  
Automatic conversion to and from 16-bit buses  
Master or slave operation  
Uses external clock or asynchronous strobes  
Easy interface to ASIC and DSP ICs  
Ultra low power: ICC No more than 85 mA in any mode  
Ideal for bus and battery powered applications  
Software: 8051 code runs from:  
Internal RAM, which is downloaded through USB  
Internal RAM, which is loaded from EEPROM  
External memory device (128 pin package)  
Available in commercial and industrial temperature grade  
(all packages except VFBGA)  
16 KB of on-chip code/data RAM  
Features (CY7C68013A/14A only)  
Four programmable BULK, INTERRUPT, and  
ISOCHRONOUS endpoints  
Buffering options: Double, triple, and quad  
CY7C68014A: Ideal for Battery Powered Applications  
Suspend current: 100 A (typ)  
CY7C68013A: Ideal for Non Battery Powered Applications  
Suspend current: 300 A (typ)  
Additional programmable (BULK/INTERRUPT) 64-byte  
endpoint  
Available in Five Pb-free Packages with Up to 40 GPIOs  
8-bit or 16-bit external data interface  
Smart media standard ECC generation  
128-pinTQFP(40GPIOs),100-pinTQFP(40GPIOs),56-pin  
QFN (24 GPIOs), 56-pin SSOP (24 GPIOs), and 56-pin  
VFBGA (24 GPIOs)  
GPIF (general programmable interface)  
Enables direct connection to most parallel interfaces  
Programmable waveform descriptors and configuration  
registers to define waveforms  
Supports multiple ready (RDY) inputs and Control (CTL)  
outputs  
Features (CY7C68015A/16A only)  
CY7C68016A: Ideal for Battery Powered Applications  
Suspend current: 100 A (typ)  
CY7C68015A: Ideal for Non Battery Powered Applications  
Suspend current: 300 A (typ)  
Integrated, industry standard enhanced 8051  
48 MHz, 24 MHz, or 12 MHz CPU operation  
Four clocks per instruction cycle  
Two USARTs  
Available in Pb-free 56-pin QFN Package (26 GPIOs)  
Two more GPIOs than CY7C68013A/14A enabling additional  
features in same footprint  
Three counter/timers  
Expanded interrupt system  
Two data pointers  
Cypress Semiconductor Corporation  
Document #: 38-08032 Rev. *V  
198 Champion Court  
San Jose, CA 95134-1709  
408-943-2600  
Revised February 7, 2012  
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