CY7C64013
CY7C64113
16.5 USB Endpoint Interrupts ...........................................................................................................29
16.6 DAC Interrupt .............................................................................................................................29
16.7 GPIO/HAPI Interrupt ..................................................................................................................29
2
16.8 I C Interrupt ................................................................................................................................30
17.0 USB OVERVIEW .........................................................................................................................30
17.1 USB Serial Interface Engine (SIE) ............................................................................................30
17.2 USB Enumeration ......................................................................................................................31
17.3 USB Upstream Port Status and Control ..................................................................................31
18.0 USB SERIAL INTERFACE ENGINE OPERATION ....................................................................32
18.1 USB Device Address .................................................................................................................32
18.2 USB Device Endpoints ..............................................................................................................32
18.3 USB Control Endpoint Mode Register .....................................................................................32
18.4 USB Non-Control Endpoint Mode Registers ...........................................................................33
18.5 USB Endpoint Counter Registers ............................................................................................33
18.6 Endpoint Mode/Count Registers Update and Locking Mechanism ......................................34
19.0 USB MODE TABLES ..................................................................................................................36
20.0 SAMPLE SCHEMATIC ................................................................................................................40
21.0 ABSOLUTE MAXIMUM RATINGS .............................................................................................41
22.0 ELECTRICAL CHARACTERISTICS ...........................................................................................41
23.0 SWITCHING CHARACTERISTICS .............................................................................................43
24.0 ORDERING INFORMATION .......................................................................................................46
25.0 PACKAGE DIAGRAMS ..............................................................................................................46
LIST OF FIGURES
Figure 5-1. Program Memory Space with Interrupt Vector Table .................................................. 13
Figure 6-1. Clock Oscillator On-Chip Circuit ................................................................................... 15
Figure 7-1. Watch Dog Reset (WDR) ................................................................................................ 16
Figure 9-1. Block Diagram of a GPIO Pin ........................................................................................ 17
Figure 9-2. Port 0 Data 0x00 (read/write) ......................................................................................... 18
Figure 9-3. Port 1 Data 0x01 (read/write) ......................................................................................... 18
Figure 9-4. Port 2 Data 0x02 (read/write) ......................................................................................... 18
Figure 9-5. Port 3 Data 0x03 (read/write) ......................................................................................... 18
Figure 9-6. GPIO Configuration Register 0x08 (read/write) ........................................................... 19
Figure 9-7. Port 0 Interrupt Enable 0x04 (read/write) ..................................................................... 19
Figure 9-8. Port 1 Interrupt Enable 0x05 (read/write) ..................................................................... 19
Figure 9-9. Port 2 Interrupt Enable 0x06 (read/write) ..................................................................... 19
Figure 9-10. Port 3 Interrupt Enable 0x07 (read/write) ................................................................... 19
Figure 10-1. Block Diagram of a DAC Pin ........................................................................................ 20
Figure 10-2. DAC Port Data 0x30 (read/write) .................................................................................20
Figure 10-3. DAC Port Isink 0x38 to 0x3F (write only) .................................................................... 20
Figure 10-4. DAC Port Interrupt Enable 0x31 (write only) .............................................................. 21
Figure 10-5. DAC Port Interrupt Polarity 0x32 (write only) ............................................................ 21
Figure 11-1. Timer Register 0x24 (read only) .................................................................................. 21
Figure 11-2. Timer Register 0x25 (read only) .................................................................................. 21
Figure 11-3. Timer Block Diagram .................................................................................................... 22
2
Figure 12-1. HAPI/I C Configuration Register 0x09 (read/write) ................................................... 22
Document #: 38-08001 Rev. **
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