CY7C64013
CY7C64113
TABLE OF CONTENTS
1.0 FEATURES .....................................................................................................................................5
2.0 FUNCTIONAL OVERVIEW .............................................................................................................6
3.0 PIN CONFIGURATIONS .................................................................................................................8
4.0 PRODUCT SUMMARY TABLES ....................................................................................................9
4.1 Pin Assignments ...........................................................................................................................9
4.2 I/O Register Summary ...................................................................................................................9
4.3 Instruction Set Summary ............................................................................................................11
5.0 PROGRAMMING MODEL .............................................................................................................12
5.1 14-Bit Program Counter (PC) ......................................................................................................12
5.1.1 Program Memory Organization .........................................................................................................13
5.2 8-Bit Accumulator (A) ..................................................................................................................13
5.3 8-Bit Temporary Register (X) ......................................................................................................13
5.4 8-Bit Program Stack Pointer (PSP) ............................................................................................14
5.4.1 Data Memory Organization ................................................................................................................14
5.5 8-Bit Data Stack Pointer (DSP) ...................................................................................................14
5.6 Address Modes ............................................................................................................................15
5.6.1 Data (Immediate) .................................................................................................................................15
5.6.2 Direct ...................................................................................................................................................15
5.6.3 Indexed ................................................................................................................................................15
6.0 CLOCKING ....................................................................................................................................15
7.0 RESET ...........................................................................................................................................16
7.1 Power-On Reset (POR) ................................................................................................................16
7.2 Watch Dog Reset (WDR) .............................................................................................................16
8.0 SUSPEND MODE ..........................................................................................................................17
9.0 GENERAL-PURPOSE I/O (GPIO) PORTS ...................................................................................17
9.1 GPIO Configuration Port .............................................................................................................18
9.2 GPIO Interrupt Enable Ports .......................................................................................................19
10.0 DAC PORT ..................................................................................................................................20
10.1 DAC Isink Registers ..................................................................................................................20
10.2 DAC Port Interrupts ...................................................................................................................21
11.0 12-BIT FREE-RUNNING TIMER .................................................................................................21
11.1 Timer (LSB) ................................................................................................................................21
11.2 Timer (MSB) ................................................................................................................................21
2
12.0 I C AND HAPI CONFIGURATION REGISTER .........................................................................22
2
13.0 I C COMPATIBLE CONTROLLER .............................................................................................23
14.0 HARDWARE ASSISTED PARALLEL INTERFACE (HAPI) .......................................................24
15.0 PROCESSOR STATUS AND CONTROL REGISTER ...............................................................25
16.0 INTERRUPTS ..............................................................................................................................26
16.1 Interrupt Vectors ........................................................................................................................27
16.2 Interrupt Latency .......................................................................................................................28
16.3 USB Bus Reset Interrupt ...........................................................................................................28
16.4 Timer Interrupt ...........................................................................................................................29
Document #: 38-08001 Rev. **
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