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CY7C63723-PC 参数 Datasheet PDF下载

CY7C63723-PC图片预览
型号: CY7C63723-PC
PDF下载: 下载PDF文件 查看货源
内容描述: 的enCoRe USB的组合低速USB和PS / 2外围控制器 [enCoRe USB Combination Low-Speed USB & PS/2 Peripheral Controller]
分类和应用: 微控制器和处理器外围集成电路光电二极管可编程只读存储器时钟
文件页数/大小: 58 页 / 1162 K
品牌: CYPRESS [ CYPRESS ]
 浏览型号CY7C63723-PC的Datasheet PDF文件第45页浏览型号CY7C63723-PC的Datasheet PDF文件第46页浏览型号CY7C63723-PC的Datasheet PDF文件第47页浏览型号CY7C63723-PC的Datasheet PDF文件第48页浏览型号CY7C63723-PC的Datasheet PDF文件第50页浏览型号CY7C63723-PC的Datasheet PDF文件第51页浏览型号CY7C63723-PC的Datasheet PDF文件第52页浏览型号CY7C63723-PC的Datasheet PDF文件第53页  
FOR  
FOR  
enCoRe™ USB CY7C63722/23  
CY7C63743  
Parameter  
Static Output Low  
Min.  
Max.  
0.3  
Unit  
V
Conditions  
With RPU to VREG pin  
VOLU  
VOHZ  
Static Output High, idle or suspend  
2.7  
3.6  
V
RPD connected D– to Gnd, RPU  
connected D– to VREG pin[4]  
VDI  
Differential Input Sensitivity  
0.2  
0.8  
0.8  
V
V
V
pF  
µA  
kΩ  
kΩ  
|(D+)–(D–)|  
VCM  
VSE  
CIN  
ILO  
RPU  
RPD  
Differential Input Common Mode Range  
Single Ended Receiver Threshold  
Transceiver Capacitance  
Hi-Z State Data Line Leakage  
External Bus Pull-up resistance (D–)  
External Bus Pull-down resistance  
2.5  
2.0  
20  
10  
1.326  
15.75  
–10  
1.274  
14.25  
0 V < Vin<3.3 V (D+ or D– pins)  
1.3 k±2% to VREG  
15 k±5% to Gnd  
[11]  
PS/2 Interface  
Static Output Low  
Internal PS/2 Pull-up Resistance  
VOLP  
RPS2  
0.4  
7
V
kΩ  
Isink = 5 mA, SDATA or SCLK pins  
SDATA, SCLK pins, PS/2 Enabled  
3
General Purpose I/O Interface  
Pull-up Resistance  
RUP  
VICR  
VICF  
VHC  
VITTL  
8
24  
kΩ  
VCC  
VCC  
VCC  
V
Input Threshold Voltage, CMOS mode  
Input Threshold Voltage, CMOS mode  
Input Hysteresis Voltage, CMOS mode  
Input Threshold Voltage, TTL mode  
Output Low Voltage, high drive mode  
40%  
35%  
3%  
60%  
55%  
10%  
2.0  
Low to high edge, Port 0 or 1  
High to low edge, Port 0 or 1  
High to low edge, Port 0 or 1  
Ports 0, 1, and 2  
0.8  
VOL1A  
0.8  
V
IOL1 = 50 mA, Ports 0 or 1[4]  
VOL1B  
0.4  
V
IOL1 = 25 mA, Ports 0 or 1[4]  
VOL2  
VOL3  
VOH  
Output Low Voltage, medium drive mode  
Output Low Voltage, low drive mode  
Output High Voltage, strong drive mode  
Pull-down resistance, XTALIN pin  
0.4  
0.4  
V
V
V
IOL2 = 8 mA, Ports 0 or 1[4]  
IOL3 = 2 mA, Ports 0 or 1[4]  
Port 0 or 1, IOH = 2 mA[4]  
Internal Clock Mode only  
VCC–2  
50  
RXIN  
kΩ  
Note:  
11. The 200internal resistance at the VREG pin gives a standard USB pull-up using this value. Alternately, a 1.5 k,5%pull-up from D– to an external 3.3V supply  
can be used.  
Document #: 38-08022 Rev. **  
Page 49 of 58