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CY7C63723-PC 参数 Datasheet PDF下载

CY7C63723-PC图片预览
型号: CY7C63723-PC
PDF下载: 下载PDF文件 查看货源
内容描述: 的enCoRe USB的组合低速USB和PS / 2外围控制器 [enCoRe USB Combination Low-Speed USB & PS/2 Peripheral Controller]
分类和应用: 微控制器和处理器外围集成电路光电二极管可编程只读存储器时钟
文件页数/大小: 58 页 / 1162 K
品牌: CYPRESS [ CYPRESS ]
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FOR  
FOR  
enCoRe™ USB CY7C63722/23  
CY7C63743  
24.0  
Absolute Maximum Ratings  
Storage Temperature ..........................................................................................................................................–65°C to +150°C  
Ambient Temperature with Power Applied...............................................................................................................–0°C to +70°C  
Supply Voltage on VCC Relative to VSS ..................................................................................................................0.5V to +7.0V  
DC Input Voltage........................................................................................................................................... –0.5V to +VCC+0.5V  
DC Voltage Applied to Outputs in High Z State............................................................................................ –0.5V to + VCC+0.5V  
Maximum Total Sink Output Current into Port 0 and 1 and Pins.......................................................................................... 70 mA  
Maximum Total Source Output Current into Port 0 and 1 and Pins ..................................................................................... 30 mA  
Maximum On-chip Power Dissipation on any GPIO Pin......................................................................................................50 mW  
Power Dissipation ..............................................................................................................................................................300 mW  
Static Discharge Voltage ................................................................................................................................................... >2000V  
Latch-up Current ............................................................................................................................................................ >200 mA  
25.0  
DC Characteristics  
FOSC = 6 MHz; Operating Temperature = 0 to 70°C  
Parameter  
General  
Operating Voltage  
Min.  
Max.  
Unit  
Conditions  
VCC1  
VCC2  
ICC1  
VLVR  
4.35  
5.5  
5.25  
20  
V
V
mA  
Note 4  
Note 4  
Operating Voltage  
VCC Operating Supply Current - Internal  
Oscillator Mode.  
VCC = 5.5V, no GPIO loading  
Typical ICC1 = 16 mA[5]  
V
CC = 5.0V. T = Room Temperature  
ICC2  
VCC Operating Supply Current - External  
17  
mA  
VCC = 5.5V, no GPIO loading  
Oscillator Mode.  
Typical ICC2= 13 mA[5]  
VCC = 5.0V. T = Room Temperature  
Oscillator off, D– > 2.7V  
Oscillator off, D– > 2.7V  
ISB1  
ISB2  
VPP  
TRSNTR  
IIL  
ISNK  
ISRC  
Standby Current - No Wake-up Osc  
Standby Current - With Wake-up Osc  
Programming Voltage (disabled)  
Resonator Start-up Interval  
Input Leakage Current  
Max ISS GPIO Sink Current  
25  
75  
0.4  
256  
1
µA  
µA  
V
–0.4  
3.5  
µs  
VCC = 5.0V, ceramic resonator  
Any I/O pin  
µA  
mA  
mA  
70  
30  
Cumulative across all ports[6]  
Cumulative across all ports[6]  
Max ICC GPIO Source Current  
Low-voltage & Power-on Reset  
Low-Voltage Reset Trip Voltage  
VCC Power-on Slew Time  
VLVR  
tVCCS  
4.0  
100  
V
ms  
VCC below VLVR for >100 ns[7]  
linear ramp: 0 to 4V[8]  
USB Interface  
VREG Regulator Output Voltage  
Capacitance on VREG Pin  
Static Output High, driven  
[9, 10]  
VREG  
CREG  
VOHU  
Notes:  
3.0  
2.8  
3.6  
300  
3.6  
V
pF  
V
Load = RPU +RPD  
External cap not required  
RPD to Gnd[4]  
4. Full functionality is guaranteed in VCC1 range, except USB transmitter specifications and GPIO output currents are guaranteed for VCC2 range.  
5. Bench measurements taken under nominal operating conditions. Spec cannot be guaranteed at final test.  
6. Total current cumulative across all Port pins, limited to minimize Power and Ground-Drop noise effects.  
7. LVR is automatically disabled during suspend mode.  
8. LVR will re-occur whenever VCC drops below VLVR. In suspend or with LVR disabled, BOR occurs whenever VCC drops below approximately 2.5V.  
9. VREG specified for regulator enabled, idle conditions (i.e., no USB traffic), with load resistors listed. During USB transmits from the internal SIE, the VREG  
output is not regulated, and should not be used as a general source of regulated voltage in that case. During receive of USB data, the VREG output drops  
when D– is LOW due to internal series resistance of approximately 200at the VREG pin.  
10. In suspend mode, VREG is only valid if RPU is connected from D– to VREG pin, and RPD is connected from D– to ground.  
Document #: 38-08022 Rev. **  
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