CY7C1061AV33
Document History Page
Document Title: CY7C1061AV33 16-Mbit (1M x 16) Static RAM
Document Number: 38-05256
Issue
Date
Orig. of
Change
REV.
ECN NO.
Description of Change
**
113725
117058
117989
03/28/02
07/31/02
08/30/02
NSL
DFP
DFP
New Data Sheet
Removed 15-ns bin
Added 8-ns bin
*A
*B
Changed Icc for 8, 10, 12 bins
power changed from 1 µs to 1 ms.
t
Load Cap Comment changed (for Tx line load)
tSD changed to 5.5 ns for the 10-ns bin
Changed some 8-ns bin numbers (tHZ, tDOE, tDBE
)
Removed hz<lz comments from data sheet
*C
120383
11/06/02
DFP
Final data sheet
Added note 3 to “AC Test Loads and Waveforms” and note 7 to tpu and tpd
Updated Input/Output Caps (for 48BGA only) to 8 pF/10 pF and for the
54-pin TSOP to 6/8 pF
*D
*E
124439
492137
2/25/03
MEG
NXR
Changed ISB1 from 100 mA to 70 mA
Shaded fBGA production ordering information
See ECN
Corrected Block Diagram on page #1
Removed 8 ns speed bin
Changed 48-Ball FBGA to 60-Ball FBGA in Pin Configuration
Included Note #1 and 2 on page #2
Changed the description of IIX from Input Load Current to Input Leakage
Current in DC Electrical Characteristics table
Updated the Ordering Information Table
*F
508117
877322
See ECN
See ECN
NXR
VKN
Updated FBGA Pin Configuration
Updated Ordering Information table
*G
Updated Ordering Information table
Document #: 38-05256 Rev. *G
Page 10 of 10
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