CY62148E MoBL
®
Switching Waveforms
Figure 4. Read Cycle No. 1
(Address Transition Controlled)
t
RC
RC
ADDRESS
t
AA
t
OHA
DATA OUT
PREVIOUS DATA VALID
DATA VALID
Figure 5. Read Cycle No. 2
(OE Controlled)
ADDRESS
t
RC
CE
t
ACE
OE
t
DOE
t
LZOE
HIGH IMPEDANCE
DATA OUT
t
LZCE
V
CC
SUPPLY
CURRENT
t
PU
50%
t
HZOE
t
HZCE
DATA VALID
t
PD
50%
I
SB
I
CC
HIGH
IMPEDANCE
Figure 6. Write Cycle No. 1
(WE Controlled, OE HIGH During Write)
t
WC
ADDRESS
t
SCE
CE
t
AW
t
SA
WE
t
PWE
t
HA
OE
t
SD
DATA I/O
NOTE 24
t
HZOE
DATA VALID
t
HD
Notes
19. Device is continuously selected. OE, CE = V
IL
.
20. WE is HIGH for read cycles.
21. Address valid before or similar to CE transition LOW.
22. Data I/O is high impedance if OE = V
IH
.
23. If CE goes HIGH simultaneously with WE HIGH, the output remains in high impedance state.
24. During this period, the I/Os are in output state and input signals must not be applied.
Document #: 38-05442 Rev. *H
Page 7 of 14
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