CY62148E MoBL
®
Capacitance
Parameter
C
IN
C
OUT
Description
Input capacitance
Output capacitance
Test Conditions
T
A
= 25 °C, f = 1 MHz,
V
CC
= V
CC
(Typ)
Max
10
10
Unit
pF
pF
Thermal Resistance
Parameter
Θ
JA
Θ
JC
Description
Thermal resistance
(junction to ambient)
Thermal resistance
(junction to case)
Figure 2. AC Test Loads and Waveforms
R1
V
CC
OUTPUT
30 pF
INCLUDING
JIG AND
SCOPE
R2
3.0 V
GND
Rise Time = 1 V/ns
10%
ALL INPUT PULSES
90%
90%
10%
Fall Time = 1 V/ns
Test Conditions
Still air, soldered on a 3 × 4.5 inch,
two-layer printed circuit board
SOIC
Package
75
10
TSOP II
Package
77
13
Unit
°C/W
°C/W
Equivalent to:
THEVENIN
EQUIVALENT
R
TH
OUTPUT
Parameter
R1
R2
R
TH
V
TH
V
5.0 V
1800
990
639
1.77
Unit
Ω
Ω
Ω
V
Data Retention Characteristics
Over the operating range
Parameter
V
DR
I
CCDR[12]
t
CDR
t
R[13]
Description
V
CC
for data retention
Data retention current
Chip deselect to data retention time
Operation recovery time
TSOP II
SOIC
V
CC
= V
DR
, CE > V
CC
– 0.2 V,
V
IN
> V
CC
– 0.2 V or V
IN
< 0.2 V
Industrial/
Automotive-A
Conditions
Min
2
–
0
45
55
Typ
–
1
–
–
–
Max
–
7
–
–
–
Unit
V
µA
ns
ns
ns
Notes
10. Tested initially and after any design or process changes that may affect these parameters.
11. Typical values are included for reference and are not guaranteed or tested. Typical values are measured at V
CC
= V
CC(typ)
, T
A
= 25 °C.
12. Chip enable (CE) must be HIGH at CMOS level to meet the I
SB2
/ I
CCDR
spec. Other inputs can be left floating.
13. Full device operation requires linear V
CC
ramp from V
DR
to V
CC
(min) > 100 µs or stable at V
CC
(min) > 100 µs.
Document #: 38-05442 Rev. *H
Page 5 of 14
CYPRESS [ CYPRESS SEMICONDUCTOR ]
