PRELIMINARY
CYW54907
Table 10. Signal Descriptions (Cont.)
Bump Number
Signal Name
Type
Description
Pulse width modulation bit 0.
PWM Interface
185
186
190
189
187
188
PWM0
PWM1
PWM2
PWM3
PWM4
PWM5
O
O
O
O
O
O
Pulse width modulation bit 1
Pulse width modulation bit 2
Pulse width modulation bit 3
Pulse width modulation bit 4
Pulse width modulation bit 5
RF Signal Interface (WLAN)
246
233
245
239
235
WRF_RFIN_2G
WRF_RFIN_5G
WRF_PAOUT_2G
WRF_PAOUT_5G
WRF_EXT_TSSIA
I
2.4 GHz WLAN receiver input
5 GHz WLAN receiver input
2.4 GHz WLAN PA output
5 GHz WLAN PA output
I
O
O
I
5 GHz TSSI input from an optional external power
amplifier/power detector
237
WRF_GPAIO_OUT
I/O
Analog GPIO
RF Switch Control Lines
215
214
211
205
206
207
202
201
200
196
RF_SW_CTRL_0
O
Programmable RF switch control lines. The control lines
are programmable via the driver and nvram.txt file.
RF_SW_CTRL_1
RF_SW_CTRL_2
RF_SW_CTRL_3
RF_SW_CTRL_4
RF_SW_CTRL_5
RF_SW_CTRL_6
RF_SW_CTRL_7
RF_SW_CTRL_8
RF_SW_CTRL_9
O
O
O
O
I/O
I/O
I/O
I/O
I/O
SDIO Interface
152
151
150
149
148
147
SDIO_CLK
I/O
I/O
I/O
I/O
I/O
I/O
SDIO cock
SDIO_CMD
SDIO command line
SDIO data line 0
SDIO data line 1
SDIO data line 2
SDIO data line 3
SDIO_DATA_0
SDIO_DATA_1
SDIO_DATA_2
SDIO_DATA_3
S/PDIF Interface
Note: Supported via 161 (I2S_SDATAO0) and 155 (I2S_SDATAO1).
SPI Flash Interface
77
73
71
75
72
74
SFL_CLK
SFL_IO0
SFL_IO1
SFL_IO2
SFL_IO3
SFL_CS
O
Flash clock
Flash data
I/O
I/O
I/O
I/O
O
Flash data
Flash data
Flash data
Flash slave select
Document Number: 002-19312 Rev. *C
Page 41 of 95
CYPRESS [ CYPRESS ]
