PRELIMINARY
CYW54907
9.2 Signal Descriptions
Table 10 provides the signal name, type, and description for each CYW54907 bump. The symbols shown under Type indicate pin
directions (I/O = bidirectional, I = input, and O = output) and the internal pull-up/pull-down characteristics (PU = weak internal pull-up
resistor and PD = weak internal pull-down resistor), if any.
Table 10. Signal Descriptions
Bump Number
Signal Name
Type
Description
Cypress Serial Control (CSC) Interfaces
92
93
89
90
I2C0_CLK
I2C0_SDATA
I2C1_CLK
O
CSC master clock.
I/O
O
CSC serial data
CSC master clock
CSC serial data
I2C1_SDATA
I/O
Clocks
222
226
213
249
250
194
WRF_XTAL_XOP
WRF_XTAL_XON
LPO_XTAL_IN
HIB_XTALIN
I
XTAL oscillator input.
O
I
XTAL oscillator output.
External sleep clock input (32.768 kHz).
3.3V 32 kHz crystal input
I
HIB_XTALOUT
CLK_REQ
O
O
3.3V 32 kHz crystal output
Reference clock request
Ethernet MAC Interface (MII/RMII)
297
293
298
294
304
311
300
284
303
299
295
296
288
310
306
312
RMII_G_RXC
I
MII receive clock
RMII_G_COL
RMII_G_CRS
RMII_G_TXC
RMII_G_TXD0
RMII_G_TXD1
RMII_G_TXD2
RMII_G_TXD3
RMII_G_RXD0
RMII_G_RXD1
RMII_G_RXD2
RMII_G_RXD3
RMII_MDIO
I
MII collision detection
MII carrier sense
I
I
MII/RMII transmit clock
MII/RMII transmit signal
MII/RMII transmit signal
MII transmit signal
O
O
O
O
I
MII transmit signal
MII/RMII receive signal
MII/RMII receive signal
MII receive signal
I
I
I
MII receive signal
I/O
O
O
I
MII/RMII management data
MII/RMII management clock
MII/RMII transmit enable
MII/RMII receive data valid
RMII_MDC
RMII_G_TXEN
RMII_G_RXDV
Document Number: 002-19312 Rev. *C
Page 38 of 95
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