PRELIMINARY
CYW54907
Contents
1. Overview............................................................ 5
1.1 Introduction ......................................................... 5
1.1.1 Features .................................................. 5
1.2 Standards Compliance ........................................ 6
7. Wireless LAN Subsystem .............................. 26
7.1 WLAN CPU and Memory Subsystem ................26
7.2 IEEE 802.11ac MAC ..........................................26
7.2.1 PSM ........................................................27
7.2.2 WEP .......................................................27
2. Power Supplies and Power Management....... 7
2.1 Power Supply Topology ...................................... 7
2.2 CYW54907 Power Management Unit Features .. 7
2.3 Power Management ......................................... 10
2.4 PMU Sequencing .............................................. 10
2.5 Power-Off Shutdown ......................................... 11
2.6 Power-Up/Power-Down/Reset Circuits ............. 11
7.2.3 TXE .........................................................28
7.2.4 RXE ........................................................28
7.2.5 IFS ..........................................................28
7.2.6 TSF .........................................................28
7.2.7 NAV ........................................................28
7.2.8 MAC-PHY Interface ................................29
7.3 IEEE 802.11™ a/b/g/n/ac PHY ...........................29
8. WLAN Radio Subsystem............................... 31
8.1 Receiver Path .....................................................31
8.2 Transmit Path .....................................................31
8.3 Calibration ..........................................................31
3. Frequency References ................................... 12
3.1 Crystal Interface and Clock Generation ............ 12
3.2 External Frequency Reference ......................... 13
3.3 External 32.768 kHz Low-Power Oscillator ....... 14
9. Pinout and Signal Descriptions.................... 33
9.1 Bump List ...........................................................34
9.2 Signal Descriptions ............................................38
4. Applications Subsystem ................................ 15
4.1 Overview ........................................................... 15
4.2 Applications CPU and Memory Subsystem ...... 15
4.3 Memory-to-Memory DMA Core ......................... 15
4.4 Cryptography Core ............................................ 15
10.GPIO Signals and Strapping Options ........... 43
10.1 Overview ............................................................43
10.2 Weak Pull-Down and Pull-Up Resistances ........43
10.3 Strapping Options ..............................................43
10.4 Alternate GPIO Signal Functions .......................44
5. Applications Subsystem External Interfaces 16
5.1 Ethernet MAC Controller (MII/RMII) .................. 16
5.2 GPIO ................................................................. 16
5.3 Cypress Serial Control ...................................... 16
5.4 I2S ..................................................................... 16
5.5 JTAG and ARM Serial Wire Debug ................... 18
5.6 PWM ................................................................. 18
11.Pin Multiplexing .............................................. 45
12.I/O States ......................................................... 48
13.Electrical Characteristics............................... 50
13.1 Absolute Maximum Ratings ...............................50
13.2 Environmental Ratings .......................................50
13.3 Electrostatic Discharge Specifications ...............51
5.7 SDIO 3.0 ........................................................... 18
5.7.1 SDIO 3.0—Device Mode ....................... 18
5.7.2 SDIO 3.0—Host Mode .......................... 20
5.8 S/PDIF ............................................................... 20
5.9 SPI Flash ........................................................... 20
5.10 UART ................................................................ 21
13.4 Recommended Operating Conditions and DC .......
Characteristics 51
13.5 Power Supply Segments ....................................53
13.6 Ethernet MAC Controller (MII/RMII) DC
Characteristics ...................................................53
5.11 USB 2.0 ............................................................. 21
5.11.1 Overview ................................................ 21
13.7 GPIO, UART, and JTAG Interfaces DC
Characteristics ...................................................53
5.11.2 USB 2.0 Features .................................. 23
5.12 SPI .................................................................... 23
14.WLAN RF Specifications................................ 54
14.1 Introduction ........................................................54
14.2 2.4 GHz Band General RF Specifications ..........54
6. Global Functions............................................. 24
6.1 External Coexistence Interface ......................... 24
6.2 One-Time Programmable Memory .................... 24
6.3 Hibernation Block .............................................. 24
6.4 System Boot Sequence ..................................... 25
14.3 WLAN 2.4 GHz Receiver Performance
Specifications .....................................................55
14.4 WLAN 2.4 GHz Transmitter Performance ..............
Specifications 57
Document Number: 002-19312 Rev. *C
Page 3 of 95
CYPRESS [ CYPRESS ]
