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BCM43570KFFBG 参数 Datasheet PDF下载

BCM43570KFFBG图片预览
型号: BCM43570KFFBG
PDF下载: 下载PDF文件 查看货源
内容描述: [Single-Chip 5G WiFi IEEE 802.11ac 2×2MAC/Baseband/Radio with IntegratedBluetooth 4.1 and EDR]
分类和应用:
文件页数/大小: 93 页 / 8056 K
品牌: CYPRESS [ CYPRESS ]
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ADVANCE  
CYW43570  
Table 19. Signal Descriptions (Cont.)  
Ball  
Signal Name  
Type  
Description  
Bluetooth UART  
E2  
BT_UART_CTS_L  
I
UART clear-to-send. Active-low clear-to-send signal for the HCI  
UART interface.  
A15  
BT_UART_RTS_L  
O
UART request-to-send. Active-low request-to-send signal for  
the HCI UART interface. BT LED control pin.  
E1  
F2  
BT_UART_RXD  
BT_UART_TXD  
I
UART serial input. Serial data input for the HCI UART interface.  
O
UART serial output. Serial data output for the HCI UART  
interface.  
Bluetooth I2S  
G1  
H8  
BT_I2S_CLK  
I/O  
I/O  
I/O  
I/O  
I2S clock, can be master (output) or slave (input).  
I2S data output.  
I2S data input.  
BT_I2S_DO  
BT_I2S_DI  
BT_I2S_WS  
H10  
E5  
I2S WS; can be master (output) or slave (input).  
Bluetooth GPIO  
G5  
BT_GPIO_4  
I/O  
I
Bluetooth general-purpose I/O.  
Miscellaneous  
E18  
WL_REG_ON  
Used by PMU to power up or power down the internal  
CYW43570 regulators used by the WLAN section. Also, when  
deasserted, this pin holds the WLAN section in reset. This pin  
has an internal 200 kpull-down resistor that is enabled by  
default. It can be disabled through programming.  
H15  
BT_REG_ON  
I
Used by PMU to power up or power down the internal  
CYW43570 regulators usedby the Bluetooth section.Also, when  
deasserted, this pin holds the Bluetooth section in reset. This pin  
has an internal 200 kpull-down resistor that is enabled by  
default. It can be disabled through programming.  
J1  
J2  
BT_DEV_WAKE  
BT_HOST_WAKE  
I/O  
I/O  
Bluetooth DEV_WAKE.  
Bluetooth HOST_WAKE.  
Integrated Voltage Regulators  
B23 SR_VDDBATA5V  
C22, C23 SR_VDDBATP5V  
A20, A21 SR_VLX  
I
Quiet VBAT.  
Power VBAT.  
I
O
CBUCK switching regulator output. Refer to Table 33 on  
page 74 for details of the inductor and capacitor required on this  
output.  
D22, D23 LDO_VDD1P5  
I
LNLDO input.  
G22, G23 LDO_VDDBAT5V  
I
LDO VBAT.  
Y23  
W23  
K23  
H23  
J23  
WRF_XTAL_VDD1P5  
WRF_XTAL_VDD1P2  
VOUT_LNLDO  
I
XTAL LDO input (1.35V).  
XTAL LDO output (1.2V).  
Output of LNLDO.  
O
O
O
O
O
O
O
VOUT_CLDO  
Output of core LDO.  
VOUT_LDO2P5  
2.5V LDO. Connects to a 2.2 F bypass capacitor to GND.  
3.3V LDO.  
E22, E23 VOUT_LDO3P3_B  
F22, F23  
F19  
VOUT_3P3  
LDO 3.3V output.  
VOUT_3P3_SENSE  
Voltage sense pin for LDO 3.3V output.  
Bluetooth Supplies  
P1  
L1  
BT_PAVDD2P5  
BT_LNAVDD1P2  
PWR  
PWR  
Bluetooth PA power supply.  
Bluetooth LNA power supply.  
Document Number: 002-15054 Rev. *I  
Page 53 of 94  
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