ADVANCE
CYW43570
8. WLAN Global Functions
8.1 WLAN CPU and Memory Subsystem
The CYW43570 WLAN section includes an integratedARM Cortex-R4 32-bit processor with internal RAM and ROM. TheARM Cortex-
R4 is a low-power processor that features low gate count, low interrupt latency, and low-cost debug capabilities. It is intended for
deeply embedded applications that require fast interrupt response features. Delivering more than 30% performance gain over
ARM7TDMI, the ARM Cortex-R4 implements the ARM v7-R architecture with support for the Thumb-2 instruction set.
At 0.19 μW/MHz, the Cortex-R4 is the most power efficient general-purpose microprocessor available, outperforming 8- and 16-bit
devices on MIPS/μW. It supports integrated sleep modes.
Using multiple technologies to reduce cost, the ARM Cortex-R4 offers improved memory utilization, reduced pin overhead, and
reduced silicon area. It supports independent buses for Code and Data access (ICode/DCode and System buses), and extensive
debug features including real time trace of program execution.
On-chip memory for the CPU includes 768 KB SRAM and 640 KB ROM.
8.2 One-Time Programmable Memory
Various hardware configuration parameters may be stored in an internal one-time programmable (OTP) memory, which is read by the
system software after device reset. In addition, customer-specific parameters, including the system vendor ID and the MAC address
can be stored, depending on the specific board design. Up to 484 bytes of user-accessible OTP are available.
The initial state of all bits in an unprogrammed OTP device is 0. After any bit is programmed to a 1, it cannot be reprogrammed to 0.
The entire OTP array can be programmed in a single write cycle using a utility provided with the Cypress WLAN manufacturing test
tools. Alternatively, multiple write cycles can be used to selectively program specific bytes, but only bits which are still in the 0 state
can be altered during each programming cycle.
Prior to OTP programming, all values should be verified using the appropriate editable nvram.txt file, which is provided with the
reference board design package.
Document Number: 002-15054 Rev. *I
Page 37 of 94
CYPRESS [ CYPRESS ]
