CYW43362
Table 14. ESD Specifications
Pin Type
Symbol
Condition
ESD Rating
Unit
CDM
ESD_HAND_CDM
Charged Device Model Contact
Discharge per JEDEC EIA/JESD22-
C101
175
V
10.4 Recommended Operating Conditions and DC Characteristics
Functional operation is not guaranteed outside the limits shown in Table 15, and operation outside these limits for extended periods
can adversely affect long-term reliability of the device.
Table 15. Recommended Operating Conditions and DC Characteristics
Value
Element
Symbol
Minimum
Typical
Maximum Unit
4.8a
DC supply voltage for VBAT
VBAT
2.3
–
V
4.8a
1.26
1.26
3.63
DC supply for WLAN power amplifier
VDDPA
2.3
3.3
V
DC supply voltage for core
VDD
1.14
1.2
1.2
–
V
V
V
DC Supply voltage for RF blocks in chip
DC supply voltage for I/O
VDDRF
1.14
1.71
VDDIO,
VDDIO_SD
DC supply voltage for RF I/Os
WRF_VCO_LDO_IN_VDD1P8
WRF_TCXO_VDD3P3 (Icc = 500 µA max)b,c
VDDIO_RF
3.13
1.4
3.3
1.8
1.8
3.46
1.9
V
V
V
–
–
1.7
3.3
Input high voltage
VIH
1.08
–
3.6
V
(WL_RST_N, EXT_SMPS_REQ, EXT_PWM_REQ)
Input low voltage
VIL
–
–
0.4
V
(WL_RST_N, EXT_SMPS_REQ, EXT_PWM_REQ)
Input high voltage (VDDIO = 1.8V)d
Input low voltage (VDDIO = 1.8V)c
Input high voltage (VDDIO = 2.5V)c
Input low voltage (VDDIO = 2.5V)c
Input high voltage (VDDIO = 3.3V)c
VIH
VIL
VIH
VIL
VIH
VIL
VIH
VIL
VIH
VIL
VOL
VOH
IIL
1.1
–
VDDIO
V
–
–
0.7
V
1.7
–
VDDIO
V
–
–
0.8
V
2.0
–
VDDIO
V
Input low voltage (VDDIO = 3.3V)c
–
–
0.8
V
SDIO input high voltage (VDDIO_SD = 1.8V)
1.17
–
VDDIO_SD
V
SDIO input low voltage (VDDIO_SD = 1.8V)
–
–
0.63
V
SDIO input high voltage (VDDIO_SD = 2.5V or 3.3V)
SDIO input low voltage (VDDIO_SD = 2.5V or 3.3V)
2.0
–
VDDIO_SD
V
–
–
0.8
0.4
–
V
Output low voltagee
Output high voltaged
Input low current
–
–
V
VDDIO – 0.4V
–
V
–
–
0.3
0.3
–
µA
µA
Input high current
IIH
–
a. The maximum continuous supply voltage is 4.8V. Brief spikes above this 4.8V can be tolerated. Specifically, voltages as high as 5.5V for up to
10 seconds cumulative duration over the lifetime of the device are allowed. Voltages as high as 5.0V for up to 250 seconds cumulative duration
over the lifetime of the device are allowed.
b. The maximum limits for TCXO_VDD3P3 noise are:
20 kHz, 100 nV/sqrt(Hz); 100 kHz, 80 nV/sqrt(Hz); 1 MHz, 50 nV/sqrt(Hz); 2 MHz, 30 nV/sqrt (Hz)
c. Conditions for Icc = 500 µA maximum are: –30°C, 3.3V, 52 MHz.
d. For non-SDIO digital I/O only.
e. For SDIO and non-SDIO outputs.
Document No. 002-14779 Rev. *G
Page 42 of 60
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