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BCM43340HKUBG 参数 Datasheet PDF下载

BCM43340HKUBG图片预览
型号: BCM43340HKUBG
PDF下载: 下载PDF文件 查看货源
内容描述: [Single-Chip, Dual-Band (2.4 GHz/5 GHz) IEEE 802.11 a/b/g/n MAC/Baseband/Radio with Integrated Bluetooth 4.0]
分类和应用:
文件页数/大小: 96 页 / 1349 K
品牌: CYPRESS [ CYPRESS ]
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PRELIMINARY  
CYW43340  
16.3 2.5V LDO (LDO2P5)  
Table 37. LDO2P5 Specifications  
Specification  
Notes  
Min.  
2.9  
Typ.  
3.6  
Max.  
4.8  
Unit  
Input supply voltage  
Min= 2.52+0.15=2.67V  
V
Dropout voltage requirement must be met under the maximum load  
for performance specifications.  
Output current  
70  
mA  
V
Output voltage, Vo  
Dropout voltage  
default = 2.52V  
2.4  
2.52  
3.4  
150  
+5  
at max load  
mV  
%
Output voltage DC  
Accuracy  
include Line/Load regulation  
–5  
Quiescent current  
No load  
8
µA  
Line regulation  
Vin from (Vo + 0.15V) to 4.8V, maximum load  
–11  
11  
31  
mV  
mV  
Load Regulation  
Load from 1–70 mA (subject to parasitic resistance of package and –  
board). Vin = 2.52 + 0.15V to 4.8V  
15  
Leakage current  
PSRR  
Powerdown mode. At Junction Temp 85°C  
5
µA  
dB  
VBAT 3.6V, Vo = 2.52V, Co = 2.2 µF,  
maximum load, 100 Hz to 100 kHz  
20  
LDO turn-on time  
LDO turn-on time when rest of chip is up  
260  
100  
µs  
In-rush current during  
turn-on  
from its output capacitor in fully-discharged state  
mA  
External output  
capacitor, Co  
Ceramic, X5R, 0402,  
(ESR: 5m-240mohm), ±20%, 6.3V  
0.7a  
2.2  
1
2.64  
µF  
µF  
External input capacitor For SR_VDDBATA5V pin (shared with Bandgap) ceramic, X5R,  
0402, ±10%, 10V. Not needed if sharing the VBAT capacitor 4.7 µF  
with SR_VDDBATP5V.  
a.Minimum cap value refers to residual cap value after taking into account part–to–part tolerance, DC–bias, temperature, aging  
16.4 HSICDVDD LDO  
Table 38. HISCDVDD LDO Specifications  
Specification  
Input supply voltage  
Notes  
Min  
1.3  
Typ  
1.35  
Max  
1.5  
Units  
Min = 1.2V + 0.1V = 1.3V.  
V
Dropout voltage requirement must be met  
under maximum load for performance specifi-  
cations.  
Output current  
80  
mA  
V
Output voltage, Vo  
Dropout voltage  
Step size 25 mV. Default = 1.2V.  
1.1  
1.2  
1.275  
100  
At maximum load. Includes 100 mrouting  
mV  
resistors at input and output.  
Output voltage DC accuracy  
Quiescent current  
Including line/load regulation.  
–4  
4
%
No load. Dependent on programming.  
ldo_cntl_i[43], ldo_cntl_i[41] to support  
different external capacitor loads.  
182  
µA  
PSRR at 1 kHz  
Input 1.35V, 50 to 300 pF, Vo = 1.2V  
Load: 80 mA  
Load: 40 mA  
24  
39  
dB  
dB  
Document Number: 002-14943 Rev. *L  
Page 79 of 96  
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