BCM4330 Preliminary Data Sheet
Signal Assignments
Table 18: FCFBGA, WLBGA, and WLCSP Signal Descriptions
Bump#
WLCSP Signal Name
Ball#
FCFBGA WLBGA
WLAN RF Interface
Type Description
E4
E3
17
WRF_RES_EXT
I
Connect to external 15 kΩ (1%) to
ground
A1
A2
B1
A2
19
21
WRF_RFIN_5G
WRF_RFOUT_5G
I
O
WLAN 802.11a internal LNA Rx input
WLAN 802.11a internal power amplifier
output
A6
A5
B3
D5
A7
A6
D4
–
18
20
1
WRF_RFIN_2G
WRF_RFOUT_2G
WRF_A_TSSI_IN
WRF_G_TSSI_IN
I
WLAN 802.11b/g and BT shared LNA RX
input
WLAN 802.11b/g internal power
amplifier output
TSSI_11a-band (see reference
schematics)
TSSI_11g-band (see reference
schematics). For the WLBGA package,
WRF_GPIO_OUT can be used as an 11g-
band TSSI input.
O
I
16
I
RF Control Lines
M3
M2
L3
K5
L4
M1
M4
K3
K5
J2
L4
M4
K3
J4
167
168
169
170
171
172
173
174
RF_SW_CTRL_0
RF_SW_CTRL_1
RF_SW_CTRL_2
RF_SW_CTRL_3
RF_SW_CTRL_4
RF_SW_CTRL_5
RF_SW_CTRL_6
RF_SW_CTRL_7
O
O
O
O
O
O
O
O
Programmable RF switch control lines.
The control lines are programmable via
the driver and NVRAM file. Contact
Broadcom for details.
J3
K4
Integrated LDOs
L10
M9
D1
L10
M9
E1
103–105 VOUT_LNLDO1
100–102 VOUT_CLDO
O
O
Output of low noise LNLDO1
Output of core LDO
Input to VCOLDO
35
WRF_VDD_VCOLDO_IN_1P8 I
D3
M10
J11
F2
M10
J11
22
91–95
96–97
WRF_VCOLDO_OUT_1P2
VIN_LDO
VOUT_3P1
O
I
O
Output of VCOLDO
Input supply pin to LDO
LDO3p1 output (+2.5V output by
default)
J12
J12
98–99
VOUT_3P3
O
LDO3p3 output (+3.3V output by
default)
®
BROADCOM
BCM4330 Preliminary Data Sheet
April 28, 2011 • 4330-DS304-RI
Page 105
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